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<title>linux/Documentation/devicetree/bindings/clock/sifive, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
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<updated>2023-02-21T16:22:04Z</updated>
<entry>
<title>dt-bindings: drop Sagar Kadam from SiFive binding maintainership</title>
<updated>2023-02-21T16:22:04Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2023-02-17T18:00:36Z</published>
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<id>urn:sha1:fb4b06f521c1cdf04088151ed587c188862e3111</id>
<content type='text'>
Sagar's email listed in maintainers is bouncing as his division was sold
off by the company. I attempted to contact him some days ago on what the
bounce email told me was his new contact information, but am yet to
receive a response.

Paul and Palmer are listed on each of the bindings, both of whom were
alive &amp; well as of Wednesday so the bindings remain maintained.

CC: Sagar Kadam &lt;sagar.kadam@openfive.com&gt;
CC: Sagar Kadam &lt;sagar.kadam@sifive.com&gt;
Link: https://lore.kernel.org/all/785425ca-4000-a7e4-16d6-4d68c91b158d@kernel.org/
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Acked-by: Palmer Dabbelt &lt;palmer@rivosinc.com&gt;
Link: https://lore.kernel.org/r/20230217180035.39658-1-conor@kernel.org
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clock: fu740-prci: add reset-cells</title>
<updated>2021-11-02T21:39:56Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzysztof.kozlowski@canonical.com</email>
</author>
<published>2021-09-20T14:49:44Z</published>
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<id>urn:sha1:4b44521c5d818f75d144e5528c7075cd680fba42</id>
<content type='text'>
The SiFive FU740 Power Reset Clock Interrupt Controller is a reset line
provider so add respective reset-cells property to fix:

  arch/riscv/boot/dts/sifive/hifive-unmatched-a00.dt.yaml: clock-controller@10000000:
    '#reset-cells' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@canonical.com&gt;
Link: https://lore.kernel.org/r/20210920144944.162431-1-krzysztof.kozlowski@canonical.com
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Acked-by: Palmer Dabbelt &lt;palmerdabbelt@google.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: fu740: prci: add YAML documentation for the FU740 PRCI</title>
<updated>2020-12-16T03:21:49Z</updated>
<author>
<name>Zong Li</name>
<email>zong.li@sifive.com</email>
</author>
<published>2020-11-26T03:00:43Z</published>
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<id>urn:sha1:a00a3f29b2a6572108572359558c441da51dad70</id>
<content type='text'>
Add YAML DT binding documentation for the SiFive FU740 PRCI. The
link of unmatched board as follow, the U740-C000 manual would be present
in the same page later.

    https://www.sifive.com/boards/hifive-unmatched

Passes dt_binding_check.

Signed-off-by: Zong Li &lt;zong.li@sifive.com&gt;
Link: https://lore.kernel.org/r/20201126030043.67390-1-zong.li@sifive.com
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: fu540: prci: convert PRCI bindings to json-schema</title>
<updated>2020-10-06T18:42:39Z</updated>
<author>
<name>Sagar Kadam</name>
<email>sagar.kadam@sifive.com</email>
</author>
<published>2020-09-29T15:32:09Z</published>
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<id>urn:sha1:406171bf9a19b15dcf80173048e444ce164381fe</id>
<content type='text'>
FU540-C000 SoC from SiFive has a PRCI block, here we convert
the device tree bindings from txt to YAML.

Signed-off-by: Sagar Kadam &lt;sagar.kadam@sifive.com&gt;
Link: https://lore.kernel.org/r/1601393531-2402-2-git-send-email-sagar.kadam@sifive.com
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: clk: add documentation for the SiFive PRCI driver</title>
<updated>2019-04-29T22:56:47Z</updated>
<author>
<name>Paul Walmsley</name>
<email>paul.walmsley@sifive.com</email>
</author>
<published>2019-04-11T08:27:34Z</published>
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<id>urn:sha1:a6c6cb2e8bdf5abe53656c9d625fc3b7974432ff</id>
<content type='text'>
Add DT binding documentation for the Linux driver for the SiFive
PRCI clock &amp; reset control IP block, as found on the SiFive
FU540 chip.

This version includes changes requested by Stephen Boyd
&lt;sboyd@kernel.org&gt; and Rob Herring &lt;robh@kernel.org&gt;, and
fixes some errors in the initial version.

Signed-off-by: Paul Walmsley &lt;paul.walmsley@sifive.com&gt;
Signed-off-by: Paul Walmsley &lt;paul@pwsan.com&gt;
Cc: Michael Turquette &lt;mturquette@baylibre.com&gt;
Cc: Stephen Boyd &lt;sboyd@kernel.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Palmer Dabbelt &lt;palmer@sifive.com&gt;
Cc: Megan Wachs &lt;megan@sifive.com&gt;
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-riscv@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
</content>
</entry>
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