linux/Documentation/devicetree/bindings/clock, branch master

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2026-02-15T16:18:57Z

Pull clk updates from Stephen Boyd: "Not much changed in the clk framework this time except the clk.h consumer API moved the context saving APIs around to fix a build error in certain configurations. There was a change to the core framework for CLK_OPS_PARENT_ENABLE behavior during registration, but it wrecked existing drivers that didn't expect things to be turned off during clk registration so it got reverted. This cycle is really a large collection of new clk drivers, primarily for Qualcomm SoCs but also for Amlogic, SpacemiT, Google, and Aspeed. Another big change in here is support for automatic hardware clock gating on Samsung SoCs where the clks turn on and off when needed. Ideally more vendors move to this method for better power savings. The highlights are in the updates section below. Beyond all the new drivers we have a bunch of cleanups like converting drivers from divider_round_rate() to divider_determine_rate() and using scoped for each OF child loops. Otherwise it's the usual data fixes and plugging reference leaks, etc. that's all pretty ordinary but not critical enough to fix until the next release. New Drivers: - Qualcomm Kaanapali global, tcsr, rpmh, display, gpu, camera, and video clk controllers - Qualcomm SM8750 camera clk controllers - Qualcomm MSM8940 and SDM439 global clk controllers - Google GS101 Display Process Unit (DPU) clk controllers - SpacemiT K3 clk controllers - Amlogic t7 clk controllers - Aspeed AST2700 clk controllers Updates: - Convert clock dividers from round_rate() to determine_rate() - Fix sparse warnings, kernel-doc warnings, and plug leaked OF refs - Automatic hardware clk gating on Google GS101 SoCs - Amlogic s4 video clks - CAN-FD clks and resets on Renesas RZ/T2H, RZ/N2H, RZ/V2H, and RZ/V2N - Expanded Serial Peripheral Interface (xSPI) clocks and resets on Renesas RZ/T21H and RZ/N2H - DMAC, interrupt controller (ICU), SPI, and thermal (TSU) clocks and resets on Renesas RZ/V2N - More serial (RSCI) clocks and resets on Renesas RZ/V2H and RZ/V2N - CPU frequency scaling on T-HEAD TH1520" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (165 commits) clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: Disable KUNIT_UML_PCI dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc ...

Merge branches 'clk-aspeed' and 'clk-qcom' into clk-next

2026-02-14T18:23:59Z

* clk-aspeed: clk: aspeed: Add reset for HACE/VIDEO dt-bindings: clock: aspeed: Add VIDEO reset definition clk: aspeed: add AST2700 clock driver MAINTAINERS: Add entry for ASPEED clock drivers. clk: aspeed: Move the existing ASPEED clk drivers into aspeed subdirectory. * clk-qcom: (49 commits) clk: qcom: sm8750: Constify 'qcom_cc_desc' in SM8750 camcc clk: qcom: gfx3d: add parent to parent request map clk: qcom: dispcc-sm7150: Fix dispcc_mdss_pclk1_clk_src clk: qcom: dispcc-sdm845: Enable parents for pixel clocks clk: qcom: regmap-divider: convert from divider_round_rate() to divider_determine_rate() clk: qcom: regmap-divider: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: qcom: alpha-pll: convert from divider_round_rate() to divider_determine_rate() clk: qcom: Add support for GPUCC and GXCLK for Kaanapali clk: qcom: Add support for VideoCC driver for Kaanapali clk: qcom: camcc: Add support for camera clock controller for Kaanapali clk: qcom: dispcc: Add support for display clock controller Kaanapali clk: qcom: clk-alpha-pll: Add support for controlling Pongo EKO_T PLL clk: qcom: clk-alpha-pll: Update the PLL support for cal_l clk: qcom: camcc: Add camera clock controller driver for SM8750 SoC clk: qcom: clk-alpha-pll: Add support for controlling Rivian PLL dt-bindings: clock: qcom: document the Kaanapali GPU Clock Controller dt-bindings: clock: qcom: Add Kaanapali video clock controller dt-bindings: clock: qcom: Add support for CAMCC for Kaanapali dt-bindings: clock: qcom: document Kaanapali DISPCC clock controller dt-bindings: clock: qcom: Add camera clock controller for SM8750 SoC ...

Merge branches 'clk-imx', 'clk-divider', 'clk-rockchip' and 'clk-microchip' into clk-next

2026-02-14T18:23:51Z

* clk-imx: clk: imx: fracn-gppll: Add 241.90 MHz Support clk: imx: fracn-gppll: Add 332.60 MHz Support * clk-divider: rtc: ac100: convert from divider_round_rate() to divider_determine_rate() clk: zynqmp: divider: convert from divider_round_rate() to divider_determine_rate() clk: x86: cgu: convert from divider_round_rate() to divider_determine_rate() clk: versaclock3: convert from divider_round_rate() to divider_determine_rate() clk: stm32: stm32-core: convert from divider_round_rate_parent() to divider_determine_rate() clk: stm32: stm32-core: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: sprd: div: convert from divider_round_rate() to divider_determine_rate() clk: sophgo: sg2042-clkgen: convert from divider_round_rate() to divider_determine_rate() clk: nxp: lpc32xx: convert from divider_round_rate() to divider_determine_rate() clk: nuvoton: ma35d1-divider: convert from divider_round_rate() to divider_determine_rate() clk: milbeaut: convert from divider_round_rate() to divider_determine_rate() clk: milbeaut: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: loongson1: convert from divider_round_rate() to divider_determine_rate() clk: hisilicon: clkdivider-hi6220: convert from divider_round_rate() to divider_determine_rate() clk: bm1880: convert from divider_round_rate() to divider_determine_rate() clk: bm1880: convert from divider_ro_round_rate() to divider_ro_determine_rate() clk: actions: owl-divider: convert from divider_round_rate() to divider_determine_rate() clk: actions: owl-composite: convert from owl_divider_helper_round_rate() to divider_determine_rate() clk: sunxi-ng: convert from divider_round_rate_parent() to divider_determine_rate() clk: sophgo: cv18xx-ip: convert from divider_round_rate() to divider_determine_rate() * clk-rockchip: clk: rockchip: Fix error pointer check after rockchip_clk_register_gate_link() * clk-microchip: dt-bindings: clock: mpfs-clkcfg: Add pic64gx compatibility dt-bindings: clock: mpfs-ccc: Add pic64gx compatibility clk: microchip: drop POLARFIRE from ARCH_MICROCHIP_POLARFIRE clk: microchip: core: remove unused include asm/traps.h clk: microchip: core: correct return value on *_get_parent() clk: microchip: core: remove duplicate determine_rate on pic32_sclk_ops

Merge branches 'clk-amlogic', 'clk-thead', 'clk-mediatek' and 'clk-samsung' into clk-next

2026-02-14T18:23:37Z

* clk-amlogic: clk: meson: gxbb: use the existing HHI_HDMI_PLL_CNTL3 macro clk: meson: g12a: Limit the HDMI PLL OD to /4 clk: meson: gxbb: Limit the HDMI PLL OD to /4 on GXL/GXM SoCs clk: amlogic: remove potentially unsafe flags from S4 video clocks clk: amlogic: add video-related clocks for S4 SoC dt-bindings: clock: add video clock indices for Amlogic S4 SoC clk: meson: t7: add t7 clock peripherals controller driver clk: meson: t7: add support for the T7 SoC PLL clock dt-bindings: clock: add Amlogic T7 peripherals clock controller dt-bindings: clock: add Amlogic T7 SCMI clock controller dt-bindings: clock: add Amlogic T7 PLL clock controller * clk-thead: clk: thead: th1520-ap: Support CPU frequency scaling clk: thead: th1520-ap: Add macro to define multiplexers with flags clk: thead: th1520-ap: Support setting PLL rates clk: thead: th1520-ap: Add C910 bus clock clk: thead: th1520-ap: Poll for PLL lock and wait for stability dt-bindings: clock: thead,th1520-clk-ap: Add ID for C910 bus clock * clk-mediatek: Revert "clk: Respect CLK_OPS_PARENT_ENABLE during recalc" clk: mediatek: Fix error handling in runtime PM setup clk: mediatek: don't select clk-mt8192 for all ARM64 builds clk: mediatek: Add mfg_eb as parent to mt8196 mfgpll clocks clk: mediatek: Refactor pllfh registration to pass device clk: mediatek: Pass device to clk_hw_register for PLLs clk: mediatek: Refactor pll registration to pass device clk: Respect CLK_OPS_PARENT_ENABLE during recalc dt-bindings: clock: mediatek,mt7622-pciesys: Remove syscon compatible clk: mediatek: Drop __initconst from gates * clk-samsung: clk: samsung: gs101: add support for Display Process Unit (DPU) clocks dt-bindings: samsung: exynos-sysreg: add gs101 dpu compatible dt-bindings: clock: google,gs101-clock: Add DPU clock management unit dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering clk: samsung: fix sysreg save/restore when PM is enabled for CMU clk: samsung: avoid warning message on legacy Exynos (auto clock gating) clk: samsung: gs101: Enable auto_clock_gate mode for each gs101 CMU clk: samsung: Implement automatic clock gating mode for CMUs dt-bindings: clock: google,gs101-clock: add samsung,sysreg property as required clk: samsung: exynosautov920: add clock support dt-bindings: clock: exynosautov920: add MFD clock definitions

Merge branches 'clk-renesas', 'clk-cleanup', 'clk-spacemit' and 'clk-tegra' into clk-next

2026-02-14T18:23:04Z

* clk-renesas: (25 commits) dt-bindings: clk: rs9: Fix DIF pattern match clk: rs9: Convert to DEFINE_SIMPLE_DEV_PM_OPS() clk: rs9: Reserve 8 struct clk_hw slots for for 9FGV0841 clk: renesas: Add missing log message terminators clk: renesas: rzg2l: Remove DSI clock rate restrictions clk: renesas: rzv2h: Deassert reset on assert timeout clk: renesas: rzg2l: Deassert reset on assert timeout clk: renesas: cpg-mssr: Unlock before reset verification clk: renesas: r9a09g056: Add entries for CANFD clk: renesas: r9a09g057: Add entries for CANFD clk: renesas: r9a09g077: Add CANFD clocks clk: renesas: cpg-mssr: Handle RZ/T2H register layout in PM callbacks dt-bindings: clock: renesas,r9a09g077/87: Add PCLKCAN ID clk: renesas: cpg-mssr: Simplify pointer math in cpg_rzt2h_mstp_read() clk: renesas: r9a09g056: Add clock and reset entries for TSU clk: renesas: r9a09g057: Add entries for RSCIs clk: renesas: r9a09g056: Add entries for RSCIs clk: renesas: r9a09g056: Add entries for the RSPIs clk: renesas: r9a09g056: Add entries for ICU clk: renesas: r9a09g056: Add entries for the DMACs ... * clk-cleanup: clk: Disable KUNIT_UML_PCI clk: zynqmp: pll: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: zynqmp: divider: Fix zynqmp_clk_divider_determine_rate kerneldoc clk: tegra: tegra124-emc: fix device leak on set_rate() clk: Annotate #else and #endif clk: Merge prepare and unprepare sections clk: Move clk_{save,restore}_context() to COMMON_CLK section clk: clk-apple-nco: Add "apple,t8103-nco" compatible clk: versatile: impd1: Simplify with scoped for each OF child loop clk: scpi: Simplify with scoped for each OF child loop clk: lmk04832: Simplify with scoped for each OF child loop * clk-spacemit: clk: spacemit: k3: add the clock tree clk: spacemit: k3: extract common header clk: spacemit: ccu_pll: add plla type clock clk: spacemit: ccu_mix: add inverted enable gate clock dt-bindings: soc: spacemit: k3: add clock support clk: spacemit: add platform SoC prefix to reset name clk: spacemit: extract common ccu functions reset: spacemit: fix auxiliary device id clk: spacemit: prepare common ccu header clk: spacemit: Hide common clock driver from user controller clk: spacemit: Respect Kconfig setting when building modules * clk-tegra: clk: tegra30: Add CSI pad clock gates clk: tegra: Set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114 clk: tegra20: Reparent dsi clock to pll_d_out0 clk: tegra: tegra124-emc: Simplify with scoped for each OF child loop clk: tegra: Adjust callbacks in tegra_clock_pm clk: tegra: tegra124-emc: Fix potential memory leak in tegra124_clk_register_emc()

dt-bindings: clk: rs9: Fix DIF pattern match

2026-02-03T00:36:14Z

The pattern match [0-19] is incorrect and does not cover range of 0..19, use pattern 1?[0-9] to cover range 0..19 instead. Update the example to validate all parts of the pattern match and prevent such failures in the future. Fixes: 26c1bc67aa2f ("dt-bindings: clk: rs9: Add Renesas 9-series I2C PCIe clock generator") Signed-off-by: Marek Vasut Reviewed-by: Conor Dooley Signed-off-by: Stephen Boyd

Merge tag 'samsung-dt64-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt

2026-01-28T17:36:57Z

Samsung DTS ARM64 changes for v6.20, part two Add DPU clock management unit nodes to Google GS101. * tag 'samsung-dt64-6.20-2' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: arm64: dts: exynos: gs101: add cmu_dpu and sysreg_dpu dt nodes dt-bindings: clock: google,gs101-clock: Add DPU clock management unit dt-bindings: clock: google,gs101-clock: fix alphanumeric ordering Signed-off-by: Arnd Bergmann

Merge tag 'qcom-arm64-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt

2026-01-26T15:05:01Z

Qualcomm Arm64 DeviceTree for v6.20 Introduce the Kaanapali SoC, with the MTP and QRD devices. Introduce support for the Milos SoC (SM7635) and initial support for the Fairphone (Gen 6) device on this platform. Add the QCS6490-based RubikPI3 board, the QRB2210-based Arduino UnoQ, the X Elite-based Medion SPRCHRGD 14 S1 and Surface Pro 11 laptops, and the SDM845-based Pixel 3 and Pixel 3 XL devices. On the Kodiak-based (QCS6490) RB3Gen2 the TC9563 PCIe switch controller is described. On Lemans (SA8775P/QCS9075) the GPU and crypto blocks are added. IO-regions and clocks are added to interconnect nodes to allow QoS configuration. GPU, TPM and USB support are enabled on the evaluation kit (EVK). On Monaco (QCS8300) the two PCIe controllers, the camera subsystem, tsens, display subsystem, crypto, CPUfreq, and coresight are added. On the evaluation kit (EVK) the PCIe busses are enabled, together with an AMC6821-based fan controller and the ST33 TPM chip. On MSM8939 the camera subsystem is described. The Asus ZenFone 2 Laser/Selfie gains battery and hall sensor support. On the Agatti-based RB1 board PM8008 is described and an overlay for the Vision mezzanine is introduced. On SDM630 the compute DSP remoteproc, FastRPC and related entites are described. The LPASS LPI pinctrl node is described. On SDM845-based OnePlus device the bootloader framebuffer and its resources are described, to improve the transition. On the SDM845-based devices from OnePlus, SHIFT, and Xiaomi ath10k calibration variants are specified. The sensor remoteproc is enabled on Xiaomi Pocophone F1. On SM7225-based Fairphone FP4 regulators for the cameras are described, and the camera EEPROM is added. On SM8650 the camera subsystem is described. On the QRD the Samsung S5KJN1 camera sensor is added, and for the HDK an overlay for the "Rear Camera Card" is added. On SM8750 CPUfreq, SDCHCI and Iris (video encode/decode) support are added, and missing - required - properties for the BAM DMA is added. These are then enabled on the MTP. On Talos (SM6150/QCS615) PMU, DisplayPort, and USB/DP combo PHY are added. DisplayPort is enabled on the Talos Ride board. On Hamoa (X Elite) add crypto engine, missing TCSR reference clocks, and random number generator block. The soc bus address width is corrected to match the hardware. On the Lenovo Thinkpad T14s HDMI and audio playback over DisplayPort is introduced. HDMI, Iris (video encode/decode) and PS8830 retimers are described for the ASUS Vivobook S 15. On the Hamoa evaluation kit (EVK) PCIe busses, WiFi, backlight, TPM and RG (red/green) LEDs are described. Enable QSEECOM, and thereby UEFI variable access, on the Medion SPRCHRGD 14 S1 (commit should have been on drivers branch). * tag 'qcom-arm64-for-6.20' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (155 commits) dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali and Glymur Platforms dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali arm64: dts: qcom: lemans: enable static TPDM arm64: dts: qcom: kodiak: Add memory region for audiopd arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: add HDMI nodes arm64: dts: qcom: x1e: bus is 40-bits (fix 64GB models) arm64: dts: qcom: lemans; Add EL2 overlay arm64: dts: qcom: sm8150: add uart13 arm64: dts: qcom: sdm845-db845c: specify power for WiFi CH1 arm64: dts: qcom: sdm845-db845c: drop CS from SPIO0 arm64: dts: qcom: qrb4210-rb2: Fix UART3 wakeup IRQ storm arm64: dts: qcom: sm6125-ginkgo: Fix missing msm-id subtype arm64: dts: qcom: qcs8300: Add GPU cooling arm64: dts: qcom: sa8775p: Add reg and clocks for QoS configuration arm64: dts: qcom: hamoa-iot-evk: Enable TPM (ST33) on SPI11 arm64: dts: qcom: talos: Add PMU support arm64: dts: qcom: talos: switch to interrupt-cells 4 to add PPI partitions arm64: dts: qcom: ipq9574: Complete USB DWC3 wrapper interrupts arm64: dts: qcom: ipq5018: Correct USB DWC3 wrapper interrupts arm64: dts: qcom: monaco: Add CTCU and ETR nodes ... Signed-off-by: Arnd Bergmann

dt-bindings: clock: mediatek,mt7622-pciesys: Remove syscon compatible

2026-01-23T01:43:40Z

The PCIESYS register space contains a pure clock controller, which has no system controller register, so this definitely doesn't need any "syscon" compatible. As a side note, luckily no devicetree ever added the syscon string to PCIESYS clock controller node compatibles, so this also resolves a dtbs_check warning for mt7622. Signed-off-by: AngeloGioacchino Del Regno Acked-by: Rob Herring (Arm) Reviewed-by: Matthias Brugger Signed-off-by: Stephen Boyd

Merge branch 'for-v6.20/dt-bindings-clk' into next/clk

2026-01-17T19:29:51Z

Merge DT binding headers from topic branch, used by the driver.