<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/Documentation/devicetree/bindings/gpu, branch v6.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2025-07-31T02:26:49Z</updated>
<entry>
<title>Merge tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel</title>
<updated>2025-07-31T02:26:49Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-07-31T02:26:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=260f6f4fda93c8485c8037865c941b42b9cba5d2'/>
<id>urn:sha1:260f6f4fda93c8485c8037865c941b42b9cba5d2</id>
<content type='text'>
Pull drm updates from Dave Airlie:
 "Highlights:

   - Intel xe enable Panthor Lake, started adding WildCat Lake

   - amdgpu has a bunch of reset improvments along with the usual IP
     updates

   - msm got VM_BIND support which is important for vulkan sparse memory

   - more drm_panic users

   - gpusvm common code to handle a bunch of core SVM work outside
     drivers.

  Detail summary:

  Changes outside drm subdirectory:
   - 'shrink_shmem_memory()' for better shmem/hibernate interaction
   - Rust support infrastructure:
      - make ETIMEDOUT available
      - add size constants up to SZ_2G
      - add DMA coherent allocation bindings
   - mtd driver for Intel GPU non-volatile storage
   - i2c designware quirk for Intel xe

  core:
   - atomic helpers: tune enable/disable sequences
   - add task info to wedge API
   - refactor EDID quirks
   - connector: move HDR sink to drm_display_info
   - fourcc: half-float and 32-bit float formats
   - mode_config: pass format info to simplify

  dma-buf:
   - heaps: Give CMA heap a stable name

  ci:
   - add device tree validation and kunit

  displayport:
   - change AUX DPCD access probe address
   - add quirk for DPCD probe
   - add panel replay definitions
   - backlight control helpers

  fbdev:
   - make CONFIG_FIRMWARE_EDID available on all arches

  fence:
   - fix UAF issues

  format-helper:
   - improve tests

  gpusvm:
   - introduce devmem only flag for allocation
   - add timeslicing support to GPU SVM

  ttm:
   - improve eviction

  sched:
   - tracing improvements
   - kunit improvements
   - memory leak fixes
   - reset handling improvements

  color mgmt:
   - add hardware gamma LUT handling helpers

  bridge:
   - add destroy hook
   - switch to reference counted drm_bridge allocations
   - tc358767: convert to devm_drm_bridge_alloc
   - improve CEC handling

  panel:
   - switch to reference counter drm_panel allocations
   - fwnode panel lookup
   - Huiling hl055fhv028c support
   - Raspberry Pi 7" 720x1280 support
   - edp: KDC KD116N3730A05, N160JCE-ELL CMN, N116BCJ-EAK
   - simple: AUO P238HAN01
   - st7701: Winstar wf40eswaa6mnn0
   - visionox: rm69299-shift
   - Renesas R61307, Renesas R69328 support
   - DJN HX83112B

  hdmi:
   - add CEC handling
   - YUV420 output support

  xe:
   - WildCat Lake support
   - Enable PanthorLake by default
   - mark BMG as SRIOV capable
   - update firmware recommendations
   - Expose media OA units
   - aux-bux support for non-volatile memory
   - MTD intel-dg driver for non-volatile memory
   - Expose fan control and voltage regulator in sysfs
   - restructure migration for multi-device
   - Restore GuC submit UAF fix
   - make GEM shrinker drm managed
   - SRIOV VF Post-migration recovery of GGTT nodes
   - W/A additions/reworks
   - Prefetch support for svm ranges
   - Don't allocate managed BO for each policy change
   - HWMON fixes for BMG
   - Create LRC BO without VM
   - PCI ID updates
   - make SLPC debugfs files optional
   - rework eviction rejection of bound external BOs
   - consolidate PAT programming logic for pre/post Xe2
   - init changes for flicker-free boot
   - Enable GuC Dynamic Inhibit Context switch

  i915:
   - drm_panic support for i915/xe
   - initial flip queue off by default for LNL/PNL
   - Wildcat Lake Display support
   - Support for DSC fractional link bpp
   - Support for simultaneous Panel Replay and Adaptive sync
   - Support for PTL+ double buffer LUT
   - initial PIPEDMC event handling
   - drm_panel_follower support
   - DPLL interface renames
   - allocate struct intel_display dynamically
   - flip queue preperation
   - abstract DRAM detection better
   - avoid GuC scheduling stalls
   - remove DG1 force probe requirement
   - fix MEI interrupt handler on RT kernels
   - use backlight control helpers for eDP
   - more shared display code refactoring

  amdgpu:
   - add userq slot to INFO ioctl
   - SR-IOV hibernation support
   - Suspend improvements
   - Backlight improvements
   - Use scaling for non-native eDP modes
   - cleaner shader updates for GC 9.x
   - Remove fence slab
   - SDMA fw checks for userq support
   - RAS updates
   - DMCUB updates
   - DP tunneling fixes
   - Display idle D3 support
   - Per queue reset improvements
   - initial smartmux support

  amdkfd:
   - enable KFD on loongarch
   - mtype fix for ext coherent system memory

  radeon:
   - CS validation additional GL extensions
   - drop console lock during suspend/resume
   - bump driver version

  msm:
   - VM BIND support
   - CI: infrastructure updates
   - UBWC single source of truth
   - decouple GPU and KMS support
   - DP: rework I/O accessors
   - DPU: SM8750 support
   - DSI: SM8750 support
   - GPU: X1-45 support and speedbin support for X1-85
   - MDSS: SM8750 support

  nova:
   - register! macro improvements
   - DMA object abstraction
   - VBIOS parser + fwsec lookup
   - sysmem flush page support
   - falcon: generic falcon boot code and HAL
   - FWSEC-FRTS: fb setup and load/execute

  ivpu:
   - Add Wildcat Lake support
   - Add turbo flag

  ast:
   - improve hardware generations implementation

  imx:
   - IMX8qxq Display Controller support

  lima:
   - Rockchip RK3528 GPU support

  nouveau:
   - fence handling cleanup

  panfrost:
   - MT8370 support
   - bo labeling
   - 64-bit register access

  qaic:
   - add RAS support

  rockchip:
   - convert inno_hdmi to a bridge

  rz-du:
   - add RZ/V2H(P) support
   - MIPI-DSI DCS support

  sitronix:
   - ST7567 support

  sun4i:
   - add H616 support

  tidss:
   - add TI AM62L support
   - AM65x OLDI bridge support

  bochs:
   - drm panic support

  vkms:
   - YUV and R* format support
   - use faux device

  vmwgfx:
   - fence improvements

  hyperv:
   - move out of simple
   - add drm_panic support"

* tag 'drm-next-2025-07-30' of https://gitlab.freedesktop.org/drm/kernel: (1479 commits)
  drm/tidss: oldi: convert to devm_drm_bridge_alloc() API
  drm/tidss: encoder: convert to devm_drm_bridge_alloc()
  drm/amdgpu: move reset support type checks into the caller
  drm/amdgpu/sdma7: re-emit unprocessed state on ring reset
  drm/amdgpu/sdma6: re-emit unprocessed state on ring reset
  drm/amdgpu/sdma5.2: re-emit unprocessed state on ring reset
  drm/amdgpu/sdma5: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx12: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx11: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx10: re-emit unprocessed state on ring reset
  drm/amdgpu/gfx9.4.3: re-emit unprocessed state on kcq reset
  drm/amdgpu/gfx9: re-emit unprocessed state on kcq reset
  drm/amdgpu: Add WARN_ON to the resource clear function
  drm/amd/pm: Use cached metrics data on SMUv13.0.6
  drm/amd/pm: Use cached data for min/max clocks
  gpu: nova-core: fix bounds check in PmuLookupTableEntry::new
  drm/amdgpu: Replace HQD terminology with slots naming
  drm/amdgpu: Add user queue instance count in HW IP info
  drm/amd/amdgpu: Add helper functions for isp buffers
  drm/amd/amdgpu: Initialize swnode for ISP MFD device
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2025-07-29T18:04:52Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-07-29T18:04:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=115e74a29b530d121891238e9551c4bcdf7b04b5'/>
<id>urn:sha1:115e74a29b530d121891238e9551c4bcdf7b04b5</id>
<content type='text'>
Pull SoC devicetree updates from Arnd Bergmann:
 "There are a few new variants of existing chips:

   - mt6572 is an older mobile phone chip from mediatek that was
     extremely popular a decade ago but never got upstreamed until now

   - exynos2200 is a recent high-end mobile phone chip used in a few
     Samsung phones like the Galaxy S22

   - Renesas R-Car V4M-7 (R8A779H2) is an updated version of R-Car V4M
     (R8A779H0) and used in automotive applications

   - Tegra264 is a new chip from NVIDIA, but support is fairly minimal
     for now, and not much information is public about it

  There are five more chips in a separate branch, as those are new chip
  families that I merged along with the necessary infrastructure.

  New board support is not that exciting, with a total of 33 newly added
  machines here:

   - Evaluation platforms for the chips above, plus TI am62d2 and Sophgo
     sg2042

   - Six 32-bit industrial boards based on stm32, imx6 and am33 chips,
     plus eight 64-bit rockchips rk33xx/rk35xx, am62d2, t527, imx8 and
     imx95

   - Two newly added ASPEED BMC based motherboards, and one that got
     removed

   - Phones and Tablets based on 32-bit mt6572, tegra30 and 64-bit
     msm8976 SoCs

   - Three Laptops based on Mediatek mt8186 and Qualcomm Snapdragon X1

   - A set-top box based on Amlogic meson-gxm

  Updates for existing machines are spread over all the above families.
  One notable change here is support for the RP1 I/O chip used in
  Raspberry Pi 5"

* tag 'soc-dt-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (606 commits)
  riscv: dts: sophgo: fix mdio node name for CV180X
  riscv: dts: sophgo: sophgo-srd3-10: reserve uart0 device
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V2.0 board device tree
  riscv: dts: sophgo: add Sophgo SG2042_EVB_V1.X board device tree
  dt-bindings: riscv: add Sophgo SG2042_EVB_V1.X/V2.0 bindings
  riscv: dts: sophgo: add ethernet GMAC device for sg2042
  riscv: dts: sophgo: Enable ethernet device for Huashan Pi
  riscv: dts: sophgo: Add mdio multiplexer device for cv18xx
  riscv: dts: sophgo: Add ethernet device for cv18xx
  riscv: dts: sophgo: sg2044: add pmu configuration
  riscv: dts: sophgo: sg2044: add ziccrse extension
  riscv: dts: sophgo: add zfh for sg2042
  riscv: dts: sophgo: add ziccrse for sg2042
  riscv: dts: sophgo: Add xtheadvector to the sg2042 devicetree
  riscv: dts: sophgo: sg2044: add PCIe device support for SG2044
  riscv: dts: sophgo: sg2044: add MSI device support for SG2044
  riscv: dts: sophgo: add reset configuration for Sophgo CV1800 series SoC
  riscv: dts: sophgo: add reset generator for Sophgo CV1800 series SoC
  dt-bindings: soc: sophgo: Move SoCs/boards from riscv into soc, add SG2000
  riscv: dts: sophgo: sg2044: Add missing riscv,cbop-block-size property
  ...
</content>
</entry>
<entry>
<title>dt-bindings: gpu: Add Apple SoC GPU</title>
<updated>2025-07-21T15:22:02Z</updated>
<author>
<name>Sasha Finkelstein</name>
<email>fnkl.kernel@gmail.com</email>
</author>
<published>2025-07-09T22:21:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f8c667edaf80a9ed91e730b9f106923119904c87'/>
<id>urn:sha1:f8c667edaf80a9ed91e730b9f106923119904c87</id>
<content type='text'>
Add bindings for the GPU present in Apple SoCs

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Reviewed-by: Sven Peter &lt;sven@kernel.org&gt;
Signed-off-by: Sasha Finkelstein &lt;fnkl.kernel@gmail.com&gt;
Link: https://lore.kernel.org/r/20250710-sgx-dt-v3-1-299bb3a65109@gmail.com
Signed-off-by: Sven Peter &lt;sven@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: gpu: mali-bifrost: Add Allwinner A523 compatible</title>
<updated>2025-07-14T21:23:52Z</updated>
<author>
<name>Mikhail Kalashnikov</name>
<email>iuncuim@gmail.com</email>
</author>
<published>2025-07-11T03:57:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7bce7ae1a1f6cfbc81ed60ddf65b306bb1ebf8f2'/>
<id>urn:sha1:7bce7ae1a1f6cfbc81ed60ddf65b306bb1ebf8f2</id>
<content type='text'>
Add a compatible for the Allwinner A523 SoC, with an integrated
ARM Mali G57 MC1 (Valhall-JM) GPU.

Signed-off-by: Mikhail Kalashnikov &lt;iuncuim@gmail.com&gt;
Link: https://lore.kernel.org/r/20250711035730.17507-2-iuncuim@gmail.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: gpu: mali-bifrost: Add compatible for MT8370 SoC</title>
<updated>2025-06-20T14:48:55Z</updated>
<author>
<name>Louis-Alexis Eyraud</name>
<email>louisalexis.eyraud@collabora.com</email>
</author>
<published>2025-05-09T10:12:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ea024e6e7a64f7f9a12bfaace61105006ba863e5'/>
<id>urn:sha1:ea024e6e7a64f7f9a12bfaace61105006ba863e5</id>
<content type='text'>
Add a compatible for the MediaTek MT8370 SoC, with an
integrated ARM Mali G57 MC2 GPU (Valhall-JM, dual core).
None of the already existing SoC specific compatibles is usable as
fallback, as those either do not match the number of cores (and number
of power domains), or are for a different GPU architecture.

Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Louis-Alexis Eyraud &lt;louisalexis.eyraud@collabora.com&gt;
Signed-off-by: Steven Price &lt;steven.price@arm.com&gt;
Link: https://lore.kernel.org/r/20250509-mt8370-enable-gpu-v6-1-2833888cb1d3@collabora.com
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-misc-next</title>
<updated>2025-06-11T07:01:34Z</updated>
<author>
<name>Thomas Zimmermann</name>
<email>tzimmermann@suse.de</email>
</author>
<published>2025-06-11T07:01:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c598d5eb9fb331ba17bc9ad67ae9a2231ca5aca5'/>
<id>urn:sha1:c598d5eb9fb331ba17bc9ad67ae9a2231ca5aca5</id>
<content type='text'>
Backmerging to forward to v6.16-rc1

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux</title>
<updated>2025-05-29T15:22:07Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-05-29T15:22:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bf373e4c786bfe989e637195252698f45b157a68'/>
<id>urn:sha1:bf373e4c786bfe989e637195252698f45b157a68</id>
<content type='text'>
Pull devicetree updates from Rob Herring:
 "DT Bindings:

   - Convert all remaining interrupt-controller bindings to DT schema

   - Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC
     PMC, imx-drm, and ftm-quaddec to DT schema

   - Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te,
     maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard

   - Add top-level constraints for renesas,vsp1 and renesas,fcp

   - Add missing constraint in amlogic,pinctrl-a4 'group' nodes

   - Adjust the allowed properties for dwc3-xilinx, sony,imx219,
     pci-iommu, and renesas,dsi

   - Add EcoNet vendor prefix

   - Fix the reserved-memory.yaml in fsl,qman-fqd

   - Drop obsolete numa.txt and cpu-topology.txt which are schemas in
     dtschema now

   - Drop Renesas RZ/N1S bindings

   - Ensure Arm cpu nodes don't allow undocumented properties. Add all
     the properties which are in use and undocumented. Drop the Mediatek
     cpufreq binding which is not a binding, but just what DT properties
     the driver uses.

   - Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU

   - Update documentation on defining child nodes with separate schemas

   - Add bindings to PSCI MAINTAINERS entry

  DT core:

   - Add new functions to simplify driver handling of 'memory-region'
     properties. Users to be added next cycle.

   - Simplify of_dma_set_restricted_buffer() to use
     of_for_each_phandle()

   - Add missing unlock on error in unittest_data_add()"

* tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits)
  dt-bindings: timer: Add fsl,vf610-pit.yaml
  dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC
  ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card
  dt-bindings: arm/cpus: Allow 2 power-domains entries
  dt-bindings: usb: dwc3-xilinx: allow dma-coherent
  media: dt-bindings: sony,imx219: Allow props from video-interface-devices
  dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block
  dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt
  dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties
  dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml
  dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller
  dt-bindings: trivial-devices: Add VZ89TE to trivial
  media: dt-bindings: renesas,vsp1: add top-level constraints
  media: dt-bindings: renesas,fcp: add top-level constraints
  dt-bindings: trivial-devices: Add Maxim max30208
  dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference
  dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema
  dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema
  dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema
  dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema
  ...
</content>
</entry>
<entry>
<title>dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC</title>
<updated>2025-05-28T13:46:08Z</updated>
<author>
<name>Tommaso Merciai</name>
<email>tommaso.merciai.xr@bp.renesas.com</email>
</author>
<published>2025-05-28T07:30:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b9457813016841df82eaa39f1f00ddebf385f352'/>
<id>urn:sha1:b9457813016841df82eaa39f1f00ddebf385f352</id>
<content type='text'>
Add a compatible string for the Renesas RZ/G3E SoC variants that
include a Mali-G52 GPU. These variants share the same restrictions on
interrupts, clocks, and power domains as the RZ/G2L SoC, so extend
the existing schema validation accordingly.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Tommaso Merciai &lt;tommaso.merciai.xr@bp.renesas.com&gt;
Link: https://lore.kernel.org/r/20250528073040.904033-1-tommaso.merciai.xr@bp.renesas.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: gpu: mali-utgard: Add Rockchip RK3528 compatible</title>
<updated>2025-05-19T18:07:34Z</updated>
<author>
<name>Jonas Karlman</name>
<email>jonas@kwiboo.se</email>
</author>
<published>2025-05-18T22:54:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6f446bbe412ab3d75651d1cc52e31aaf801dbea8'/>
<id>urn:sha1:6f446bbe412ab3d75651d1cc52e31aaf801dbea8</id>
<content type='text'>
Rockchip RK3528 SoC has a Mali-450 MP2. Add a compatible for it.

Signed-off-by: Jonas Karlman &lt;jonas@kwiboo.se&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://lore.kernel.org/r/20250518225418.682182-2-jonas@kwiboo.se
</content>
</entry>
<entry>
<title>dt-bindings: gpu: mali-bifrost: Add compatible for RZ/V2N SoC</title>
<updated>2025-05-09T22:26:40Z</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2025-05-02T16:25:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a92b9efaf2cff15a28723f592ee21df0561e58c3'/>
<id>urn:sha1:a92b9efaf2cff15a28723f592ee21df0561e58c3</id>
<content type='text'>
Add a compatible string for the Renesas RZ/V2N SoC variants that include a
Mali-G31 GPU. These variants share the same restrictions on interrupts,
clocks, and power domains as the RZ/G2L SoC, so extend the existing schema
validation accordingly.

Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20250502162540.165962-1-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
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