linux/Documentation/devicetree/bindings/interrupt-controller, branch master

Merge tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2026-04-17T21:09:02Z

Pull devicetree updates from Rob Herring: "DT core: - Cleanup of the reserved memory code to keep CMA specifics in CMA code - Add and convert several users to new of_machine_get_match() helper - Validate nul termination in string properties - Update dtc to upstream v1.7.2-69-g53373d135579 - Limit matching reserved memory devices to /reserved-memory nodes - Fix some UAF in unittests - Remove Baikal SoC bus driver - Fix false DT_SPLIT_BINDING_PATCH checkpatch warning - Allow fw_devlink device-tree on x86 - Fix kerneldoc return description for of_property_count_elems_of_size() DT bindings: - Add fsl,imx25-aips, fsl,imx25-tcq, qcom,eliza-pdc, qcom,eliza-spmi-pmic-arb, qcom,hawi-imem, qcom,milos-imem, qcom,hawi-pdc, and lg,sw49410 bindings - Convert arm,vexpress-scc to DT schema - Deprecate Qualcomm generic CPU compatibles. Add Apple M3 CPU cores. - Move some dual-link display panels to the dual-link schema - Drop mux controller node name constraints - Remove Baikal SoC bus bindings - Fix a false warning in the thermal trip node binding" * tag 'devicetree-for-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (39 commits) dt-bindings: display: panel: panel-simple: Add lg,sw49410 compatible dt-bindings: display: ti, am65x-dss: Fix AM62L DSS reg and clock constraints dt-bindings: display: simple: Move Innolux G156HCE-L01 panel to dual-link dt-bindings: display: simple: Move AUO 21.5" FHD to dual-link dt-bindings: thermal: Fix false warning with 'phandle' in trips nodes of: unittest: fix use-after-free in testdrv_probe() of: unittest: fix use-after-free in of_unittest_changeset() dt-bindings: qcom,pdc: document the Hawi Power Domain Controller dt-bindings: ARM: arm,vexpress-scc: convert to DT schema drivers/of: fdt: validate flat DT string properties before string use drivers/of: fdt: validate stdout-path properties before parsing them dt-bindings: sram: Document qcom,hawi-imem compatible dt-bindings: sram: Allow multiple-word prefixes to sram subnode dt-bindings: sram: Document qcom,milos-imem scripts/dtc: Update to upstream version v1.7.2-69-g53373d135579 of: property: Allow fw_devlink device-tree on x86 dt-bindings: arm: cpus: Add Apple M3 CPU core compatibles dt-bindings: display: lt8912b: Drop redundant endpoint properties dt-bindings: opp-v2: Fix example 3 CPU reg value dt-bindings: connector: add pd-disable dependency ...

Merge tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2026-04-17T03:34:34Z

Pull SoC driver updates from Arnd Bergmann: "The driver updates again are all over the place with many minor fixes going into platform specific code. The most notable changes are: - Support for Microchip pic64gx system controllers - Work on cleaning up devicetree bindings for SoC drivers, and converting them into the new format - Lots of smaller changes for Qualcomm SoC drivers, including support for a number of newly supported chips - reset controller API cleanups and a new driver for Cix Sky1 - Reworks of the Tegra PMC and CBB drivers, along with a change to how individual Tegra SoCs get selected in Kconfig and BPMP firmware driver updates including a refresh of the ABI header to match the version used by firmware - STM32 updates to the firewall bus driver and support for the debug bus through OP-TEE - SCMI firmware driver improvements for reliability, in particular for dealing with broken firmware interrupts - Memory driver updates for Tegra, and a patch to remove the unused Baikal T1 driver" * tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (193 commits) firmware: arm_ffa: Use the correct buffer size during RXTX_MAP firmware: qcom: scm: Allow QSEECOM on Lenovo IdeaCentre Mini X clk: spear: fix resource leak in clk_register_vco_pll() reset: rzv2h-usb2phy: Add support for VBUS mux controller registration reset: rzv2h-usb2phy: Convert to regmap API dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property soc: microchip: add mpfs gpio interrupt mux driver dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux gpio: mpfs: Add interrupt support soc: qcom: ubwc: add helpers to get programmable values soc: qcom: ubwc: add helper to get min_acc length firmware: qcom: scm: Register gunyah watchdog device soc: qcom: socinfo: Add SoC ID for SA8650P dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P firmware: qcom: scm: Allow QSEECOM on Mahua CRD soc: qcom: wcnss: simplify allocation of req soc: qcom: pd-mapper: Add support for Eliza soc: qcom: aoss: compare against normalized cooling state soc: qcom: llcc: fix v1 SB syndrome register offset ...

dt-bindings: qcom,pdc: document the Hawi Power Domain Controller

2026-04-15T20:06:12Z

Document the Power Domain Controller on the Qualcomm Hawi SoC. Reviewed-by: Konrad Dybcio Signed-off-by: Mukesh Ojha Link: https://patch.msgid.link/20260401125004.592925-1-mukesh.ojha@oss.qualcomm.com Signed-off-by: Rob Herring (Arm)

Merge tag 'tegra-for-7.1-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

2026-04-04T14:09:43Z

dt-bindings: Changes for v7.1-rc1 This contains a few conversions to DT schema along with various additions and fixes to reduce the amount of validation warnings. Included are also a new binding for the PCIe controller found on Tegra264 as well as compatible strings for the Jetson AGX Thor Developer Kit. * tag 'tegra-for-7.1-dt-bindings' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: dt-bindings: arm: tegra: Document Jetson AGX Thor DevKit dt-bindings: display: tegra: Document Tegra20 HDMI port dt-bindings: arm: tegra: Add Tegra238 CBB compatible strings dt-bindings: memory: tegra210: Mark EMC as cooling device dt-bindings: memory: Add Tegra210 memory controller bindings dt-bindings: phy: tegra: Document Tegra210 USB PHY dt-bindings: arm: tegra: Add missing compatible strings dt-bindings: interrupt-controller: tegra: Fix reg entries dt-bindings: clock: tegra124-dfll: Convert to json-schema dt-bindings: phy: tegra-xusb: Document Type C support dt-bindings: pci: Document the NVIDIA Tegra264 PCIe controller Signed-off-by: Krzysztof Kozlowski

dt-bindings: interrupt-controller: tegra: Fix reg entries

2026-03-27T15:25:44Z

Tegra210 takes exactly 6 "reg" property entries, as opposed to Tegra30 which supports only 5 entries. Reviewed-by: Rob Herring (Arm) Signed-off-by: Thierry Reding

dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support

2026-03-26T16:11:49Z

Add compatible string for the interrupt steering controller used in NXP S32N79 SoC. The S32N79 SoC differs from the i.MX version by not implementing the CHANCTRL register, but otherwise maintains the same programming model and register layout. Co-developed-by: Larisa Grigore Signed-off-by: Larisa Grigore Signed-off-by: Ciprian Marian Costea Reviewed-by: Krzysztof Kozlowski Signed-off-by: Frank Li

dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G3L SoC

2026-03-26T15:56:20Z

Document RZ/G3L (R9A08G046) IRQC. The IRQC block on the RZ/G3L SoC is nearly identical to that found on the RZ/G3S SoC, with the following differences: it supports more external interrupts and GPT error interrupts, and adds registers for GPT/MTU interrupt selection and shared interrupt selection between external interrupt and TINT. A new compatible string "renesas,r9a08g046-irqc" is therefore introduced for the RZ/G3L SoC. Signed-off-by: Biju Das Signed-off-by: Thomas Gleixner Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20260325192451.172562-3-biju.das.jz@bp.renesas.com

dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Use pattern for interrupt-names

2026-03-26T15:56:20Z

Simplify the bindings by using pattern property for interrupt-names. It also allows to change the ordering of interrupts. Signed-off-by: Biju Das Signed-off-by: Thomas Gleixner Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20260325192451.172562-2-biju.das.jz@bp.renesas.com

dt-bindings: interrupt-controller: Add LS7A PCH LPC

2026-03-26T15:15:03Z

Loongson 7A series PCH contains an LPC controller with an interrupt controller. Add the device tree binding for the interrupt controller. Signed-off-by: Icenowy Zheng Signed-off-by: Thomas Gleixner Reviewed-by: Jiaxun Yang Reviewed-by: Huacai Chen Reviewed-by: Rob Herring (Arm) Link: https://patch.msgid.link/20260321092032.3502701-4-zhengxingda@iscas.ac.cn

dt-bindings: interrupt-controller: arm,gic-v3: Fix EPPI range

2026-03-12T15:13:07Z

According to the "Arm Generic Interrupt Controller (GIC) Architecture Specification, v3 and v4", revision H.b[1], there can be only 64 Extended PPI interrupts. [1] https://developer.arm.com/documentation/ihi0069/hb/ Fixes: 4b049063e0bcbfd3 ("dt-bindings: interrupt-controller: arm,gic-v3: Describe EPPI range support") Signed-off-by: Geert Uytterhoeven Brain-farted-by: Marc Zyngier Acked-by: Marc Zyngier Link: https://patch.msgid.link/3e49a63c6b2b6ee48e3737adee87781f9c136c5f.1772792753.git.geert+renesas@glider.be Signed-off-by: Rob Herring (Arm)