linux/Documentation/devicetree/bindings/interrupt-controller, branch v6.7

Merge tag 'devicetree-fixes-for-6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2023-12-07T20:22:36Z

Pull devicetree fixes from Rob Herring: - Fix dt-extract-compatibles for builds with in tree build directory - Drop Xinlei Lee bouncing email - Fix the of_reconfig_get_state_change() return value documentation - Add missing #power-domain-cells property to QCom MPM - Fix warnings in i.MX LCDIF and adi,adv7533 * tag 'devicetree-fixes-for-6.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: dt-bindings: display: adi,adv75xx: Document #sound-dai-cells dt-bindings: lcdif: Properly describe the i.MX23 interrupts dt-bindings: interrupt-controller: Allow #power-domain-cells of: dynamic: Fix of_reconfig_get_state_change() return value documentation dt-bindings: display: mediatek: dsi: remove Xinlei's mail dt: dt-extract-compatibles: Don't follow symlinks when walking tree

dt-bindings: interrupt-controller: Allow #power-domain-cells

2023-12-06T13:42:43Z

MPM provides a single genpd. Allow #power-domain-cells = <0>. Fixes: 54fc9851c0e0 ("dt-bindings: interrupt-controller: Add Qualcomm MPM support") Acked-by: Shawn Guo Acked-by: Krzysztof Kozlowski Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20231129-topic-mpmbindingspd-v2-1-acbe909ceee1@linaro.org Signed-off-by: Rob Herring

Merge tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2023-11-02T00:37:04Z

Pull SoC DT updates from Arnd Bergmann: "There are a couple new SoCs that are supported for the first time: - AMD Pensando Elba is a data processing unit based on Cortex-A72 CPU cores - Sophgo makes RISC-V based chips, and we now support the CV1800B chip used in the milkv-duo board and the massive sg2042 chip in the milkv-pioneer, a 64-core developer workstation. - Qualcomm Snapdragon 720G (sm7125) is a close relative of Snapdragon 7c and gets added with some Xiaomi phones - Renesas gains support for the R8A779F4 (R-Car S4-8) automotive SoC and the RZ/G3S (R9A08G045) embedded SoC. There are also a bunch of newly supported machines that use already supported chips. On the 32-bit side, we have: - USRobotics USR8200 is a NAS/Firewall/router based on the ancient Intel IXP4xx platform - A couple of machines based on the NXP i.MX5 and i.MX6 platforms - One machine each for Allwinner V3s, Aspeed AST2600, Microchip sama5d29 and ST STM32mp157 The other ones all use arm64 cores on chips from allwinner, amlogic, freescale, mediatek, qualcomm and rockchip" * tag 'soc-dt-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (641 commits) ARM: dts: BCM5301X: Set switch ports for Linksys EA9200 ARM: dts: BCM5301X: Set fixed-link for extra Netgear R8000 CPU ports ARM: dts: BCM5301X: Explicitly disable unused switch CPU ports ARM: dts: BCM5301X: Relicense Vivek's code to the GPL 2.0+ / MIT ARM: dts: BCM5301X: Relicense Felix's code to the GPL 2.0+ / MIT ARM: dts: BCM5301X: Set MAC address for Asus RT-AC87U arm64: dts: socionext: add missing cache properties riscv: dts: thead: convert isa detection to new properties arm64: dts: Update cache properties for socionext arm64: dts: ti: k3-am654-idk: Add ICSSG Ethernet ports arm64: dts: ti: k3-am654-icssg2: add ICSSG2 Ethernet support arm64: dts: ti: k3-am65-main: Add ICSSG IEP nodes arm64: dts: ti: k3-am62p5-sk: Updates for SK EVM arm64: dts: ti: k3-am62p: Add nodes for more IPs arm64: dts: rockchip: Add Turing RK1 SoM support dt-bindings: arm: rockchip: Add Turing RK1 dt-bindings: vendor-prefixes: add turing arm64: dts: rockchip: Add DFI to rk3588s arm64: dts: rockchip: Add DFI to rk356x arm64: dts: rockchip: Always enable DFI on rk3399 ...

Merge tag 'devicetree-for-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2023-11-01T04:50:13Z

Pull devicetree updates from Rob Herring: - Add a kselftest to check for unprobed DT devices - Fix address translation for some 3 address cells cases - Refactor firmware node refcounting for AMBA bus - Add bindings for qcom,sm4450-pdc, Qualcomm Kryo 465 CPU, and Freescale QMC HDLC - Add Marantec vendor prefix - Convert qcom,pm8921-keypad, cnxt,cx92755-wdt, da9062-wdt, and atmel,at91rm9200-wdt bindings to DT schema - Several additionalProperties/unevaluatedProperties on child node schemas fixes - Drop reserved-memory bindings which now live in dtschema project - Fix a reference to rockchip,inno-usb2phy.yaml - Remove backlight nodes from display panel examples - Expand example for using DT_SCHEMA_FILES - Merge simple LVDS panel bindings to one binding doc * tag 'devicetree-for-6.7' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (34 commits) dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add support for QMC HDLC dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Add 'additionalProperties: false' in child nodes dt-bindings: soc: fsl: cpm_qe: cpm1-scc-qmc: Fix example property name dt-bindings: arm,coresight-cti: Add missing additionalProperties on child nodes dt-bindings: arm,coresight-cti: Drop type for 'cpu' property dt-bindings: soundwire: Add reference to soundwire-controller.yaml schema dt-bindings: input: syna,rmi4: Make "additionalProperties: true" explicit media: dt-bindings: ti,ds90ub960: Add missing type for "i2c-alias" dt-bindings: input: qcom,pm8921-keypad: convert to YAML format of: overlay: unittest: overlay_bad_unresolved: Spelling s/ok/okay/ of: address: Consolidate bus .map() functions of: address: Store number of bus flag cells rather than bool of: unittest: Add tests for address translations of: address: Remove duplicated functions of: address: Fix address translation when address-size is greater than 2 dt-bindings: watchdog: cnxt,cx92755-wdt: convert txt to yaml dt-bindings: watchdog: da9062-wdt: convert txt to yaml dt-bindings: watchdog: fsl,scu-wdt: Document imx8dl dt-bindings: watchdog: atmel,at91rm9200-wdt: convert txt to yaml dt-bindings: usb: rockchip,dwc3: update inno usb2 phy binding name ...

dt-bindings: interrupt-controller: Add SOPHGO CV1800B plic

2023-10-07T12:34:05Z

Add compatible string for SOPHGO CV1800B plic. Signed-off-by: Jisheng Zhang Acked-by: Conor Dooley Signed-off-by: Conor Dooley

dt-bindings: interrupt-controller: arm,gic-v3: Add dma-noncoherent property

2023-10-07T11:47:12Z

The GIC v3 specifications allow redistributors and ITSes interconnect ports used to access memory to be wired up in a way that makes the respective initiators/memory observers non-coherent. Add the standard dma-noncoherent property to the GICv3 bindings to allow firmware to describe the redistributors/ITSes components and interconnect ports behaviour in system designs where the redistributors and ITSes are not coherent with the CPU. Reviewed-by: Rob Herring Signed-off-by: Lorenzo Pieralisi Cc: Rob Herring Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20231006125929.48591-2-lpieralisi@kernel.org

dt-bindings: interrupt-controller: renesas,irqc: Add r8a779f0 support

2023-10-07T11:47:05Z

Document support for the Interrupt Controller for External Devices (INT-EX) in the Renesas R-Car S4-8 (R8A779F0) SoC. Signed-off-by: Geert Uytterhoeven Reviewed-by: Kieran Bingham Reviewed-by: Yoshihiro Shimoda Acked-by: Conor Dooley Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/9467a1c67d5d240211f88336973fa968d39cc860.1690446928.git.geert+renesas@glider.be

dt-bindings: interrupt-controller: renesas,rzg2l-irqc: Document RZ/G2UL SoC

2023-10-07T11:27:39Z

Document RZ/G2UL (R9A07G043U) IRQC bindings. The IRQC block on RZ/G2UL SoC is almost identical to one found on the RZ/G2L SoC the only difference being it can support BUS_ERR_INT for which it has additional registers. Hence new generic compatible string "renesas,r9a07g043u-irqc" is added for RZ/G2UL SoC. Now that we have additional interrupt for RZ/G2UL and RZ/Five SoC interrupt-names property is added so that we can parse them based on names. While at it updated the example node to four spaces and added interrupt-names property. Signed-off-by: Lad Prabhakar Reviewed-by: Rob Herring Reviewed-by: Geert Uytterhoeven Signed-off-by: Marc Zyngier Link: https://lore.kernel.org/r/20231006121058.13890-1-prabhakar.mahadev-lad.rj@bp.renesas.com

dt-bindings: interrupt-controller: Add Sophgo sg2042 CLINT mswi

2023-10-06T13:40:09Z

The clint of Sophgo's sg2042 is based off IP designed by T-HEAD, and implements the not yet frozen ACLINT spec. This spec seems to be abandoned, and will not be frozen in the predictable future. Frozen specs required by the RISC-V maintainers before merging content relating to those extensions, therefore a generic compatible is not appropriate. Instead, add new vendor specific compatible strings to identify mswi of sg2042 clint. Signed-off-by: Inochi Amaoto Signed-off-by: Chen Wang [conor: re-wrote commit message to drop irrelevant sifive,clint discussion] Signed-off-by: Conor Dooley

dt-bindings: interrupt-controller: Add Sophgo SG2042 PLIC

2023-10-06T13:36:54Z

Add compatible string for SOPHGO SG2042 plic. Acked-by: Chao Wei Reviewed-by: Guo Ren Acked-by: Conor Dooley Signed-off-by: Chen Wang Signed-off-by: Conor Dooley