<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/Documentation/devicetree/bindings/mailbox, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-02-14T19:13:32Z</updated>
<entry>
<title>Merge tag 'mailbox-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox</title>
<updated>2026-02-14T19:13:32Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-02-14T19:13:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f0a475aedd190db95cf92914ca7760c06fbdb704'/>
<id>urn:sha1:f0a475aedd190db95cf92914ca7760c06fbdb704</id>
<content type='text'>
Pull mailbox updates from Jassi Brar:
 "Platform and core updates

  PCC:
   - Updates to transmission and interrupt handling, including dynamic
     txdone configuration, -&gt;last_tx_done() wiring, and SHMEM
     initialization fixes. Reverted previous shared buffer patch

  MediaTek
   - Introduce mtk-vcp-mailbox driver and bindings for MT8196 VCP
   - Expand mtk-cmdq for MT8196 with GCE virtualization, mminfra_offset,
     and instruction generation data

  Spreadtrum (SPRD)
   - Add Mailbox Revision 2 support and UMS9230 bindings
   - Fix unhandled interrupt masking and TX done delivery flags

  Microchip
   - Add pic64gx compatibility to MPFS
   - Fix out-of-bounds access and smatch warnings in mchp-ipc-sbi

  Core &amp; Misc Platform Updates
   - Prevent out-of-bounds access in fw_mbox_index_xlate()
   - Add bindings for Qualcomm CPUCP (Kaanapali)
   - Simplify mtk-cmdq and zynqmp-ipi with scoped OF child iterators
   - Consolidate various minor fixes, dead code removal, and typo
     corrections across Broadcom, NXP, Samsung, Xilinx, ARM, and core
     headers"

* tag 'mailbox-v6.20' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox: (34 commits)
  mailbox: sprd: mask interrupts that are not handled
  mailbox: sprd: add support for mailbox revision 2
  mailbox: sprd: clear delivery flag before handling TX done
  dt-bindings: mailbox: sprd: add compatible for UMS9230
  mailbox: bcm-ferxrm-mailbox: Use default primary handler
  mailbox: Remove mailbox_client.h from controller drivers
  mailbox: zynqmp-ipi: Simplify with scoped for each OF child loop
  mailbox: mtk-cmdq: Simplify with scoped for each OF child loop
  dt-bindings: mailbox: xlnx,zynqmp-ipi-mailbox: Document msg region requirement
  mailbox: Improve RISCV_SBI_MPXY_MBOX guidance
  mailbox: mchp-ipc-sbi: fix uninitialized symbol and other smatch warnings
  mailbox: arm_mhuv3: fix typo in comment
  mailbox: cix: fix typo in error message
  mailbox: imx: Skip the suspend flag for i.MX7ULP
  mailbox: exynos: drop unneeded runtime pointer (pclk)
  mailbox: pcc: Remove spurious IRQF_ONESHOT usage
  mailbox: mtk-cmdq: Add driver data to support for MT8196
  mailbox: mtk-cmdq: Add mminfra_offset configuration for DRAM transaction
  mailbox: mtk-cmdq: Add GCE hardware virtualization configuration
  mailbox: mtk-cmdq: Add cmdq private data to cmdq_pkt for generating instruction
  ...
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: sprd: add compatible for UMS9230</title>
<updated>2026-02-02T00:59:14Z</updated>
<author>
<name>Otto Pflüger</name>
<email>otto.pflueger@abscue.de</email>
</author>
<published>2026-01-10T15:43:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0856aed508878c6208cf17c75361317287101b3d'/>
<id>urn:sha1:0856aed508878c6208cf17c75361317287101b3d</id>
<content type='text'>
Add a compatible string for the mailbox controller found in the UMS9230
SoC.

Signed-off-by: Otto Pflüger &lt;otto.pflueger@abscue.de&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: xlnx,zynqmp-ipi-mailbox: Document msg region requirement</title>
<updated>2026-01-25T00:42:39Z</updated>
<author>
<name>Harini T</name>
<email>harini.t@amd.com</email>
</author>
<published>2026-01-09T06:22:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dac2b98ede6c29f01dec95e88fef59e5138bd3a4'/>
<id>urn:sha1:dac2b98ede6c29f01dec95e88fef59e5138bd3a4</id>
<content type='text'>
Add description clarifying that for Versal IPI mailboxes, both host and
remote agents must have the "msg" register region defined for successful
message passing. Without both, only notification-based communication
works.

Signed-off-by: Harini T &lt;harini.t@amd.com&gt;
Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mbox: add pic64gx mailbox compatibility to mpfs mailbox</title>
<updated>2026-01-18T20:19:20Z</updated>
<author>
<name>Pierre-Henry Moussay</name>
<email>pierre-henry.moussay@microchip.com</email>
</author>
<published>2025-11-17T15:46:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=74ff7036589a8b7708b7cdad76d1aff1a842e5ba'/>
<id>urn:sha1:74ff7036589a8b7708b7cdad76d1aff1a842e5ba</id>
<content type='text'>
pic64gx mailbox is compatible with mpfs mailbox, even if the mailbox
consumer is not - the underlying communication mechanism is the same.

Signed-off-by: Pierre-Henry Moussay &lt;pierre-henry.moussay@microchip.com&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali</title>
<updated>2026-01-18T18:50:45Z</updated>
<author>
<name>Jingyi Wang</name>
<email>jingyi.wang@oss.qualcomm.com</email>
</author>
<published>2025-10-22T06:32:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d96ebba37b7d08a4d7d5f4b992b4400e6e7b8fa1'/>
<id>urn:sha1:d96ebba37b7d08a4d7d5f4b992b4400e6e7b8fa1</id>
<content type='text'>
Document CPUSS Control Processor (CPUCP) mailbox controller for Qualcomm
Kaanapali, which is compatible with X1E80100, use fallback to indicate
this.

Signed-off-by: Jingyi Wang &lt;jingyi.wang@oss.qualcomm.com&gt;
Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: mediatek,mt8196-vcp-mbox: add mtk vcp-mbox document</title>
<updated>2026-01-18T18:50:45Z</updated>
<author>
<name>Jjian Zhou</name>
<email>jjian.zhou@mediatek.com</email>
</author>
<published>2025-10-13T06:31:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c2b75a5353aec990bbb8bd53737d39b497a7bdaa'/>
<id>urn:sha1:c2b75a5353aec990bbb8bd53737d39b497a7bdaa</id>
<content type='text'>
The MTK VCP mailbox enables the SoC to communicate with the VCP by passing
messages through 64 32-bit wide registers. It has 32 interrupt vectors in
either direction for signalling purposes.

This adds a binding for Mediatek VCP mailbox.

Signed-off-by: Jjian Zhou &lt;jjian.zhou@mediatek.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Reviewed-by: Chen-Yu Tsai &lt;wenst@chromium.org&gt;
Reviewed-by: AngeloGioacchino Del Regno &lt;angelogioacchino.delregno@collabora.com&gt;
Signed-off-by: Jassi Brar &lt;jassisinghbrar@gmail.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom: Add IPCC support for Kaanapali and Glymur Platforms</title>
<updated>2026-01-17T21:35:17Z</updated>
<author>
<name>Jingyi Wang</name>
<email>jingyi.wang@oss.qualcomm.com</email>
</author>
<published>2025-10-31T07:41:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fc12767c19d49663b13ba2def6e4674df041c8a2'/>
<id>urn:sha1:fc12767c19d49663b13ba2def6e4674df041c8a2</id>
<content type='text'>
Document the Inter-Processor Communication Controller on the Qualcomm
Kaanapali and Glymur Platforms, which will be used to route interrupts
across various subsystems found on the SoC.

Co-developed-by: Sibi Sankar &lt;sibi.sankar@oss.qualcomm.com&gt;
Signed-off-by: Sibi Sankar &lt;sibi.sankar@oss.qualcomm.com&gt;
Signed-off-by: Jingyi Wang &lt;jingyi.wang@oss.qualcomm.com&gt;
Reviewed-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@linaro.org&gt;
Link: https://lore.kernel.org/r/20251031-knp-ipcc-v3-1-62ffb4168dff@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali</title>
<updated>2026-01-16T19:31:14Z</updated>
<author>
<name>Jingyi Wang</name>
<email>jingyi.wang@oss.qualcomm.com</email>
</author>
<published>2025-10-22T06:32:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=58e69e8f9c9a4df948dfc554c26b8f4adf505636'/>
<id>urn:sha1:58e69e8f9c9a4df948dfc554c26b8f4adf505636</id>
<content type='text'>
Document CPUSS Control Processor (CPUCP) mailbox controller for Qualcomm
Kaanapali, which is compatible with X1E80100, use fallback to indicate
this.

Signed-off-by: Jingyi Wang &lt;jingyi.wang@oss.qualcomm.com&gt;
Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20251021-knp-cpufreq-v2-1-95391d66c84e@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: mailbox: qcom: Document SM8750 CPUCP mailbox controller</title>
<updated>2026-01-03T18:16:36Z</updated>
<author>
<name>Jagadeesh Kona</name>
<email>jagadeesh.kona@oss.qualcomm.com</email>
</author>
<published>2025-12-10T19:02:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=65ce09d2f164a3d91b5802ecd0783aa2c9a208c0'/>
<id>urn:sha1:65ce09d2f164a3d91b5802ecd0783aa2c9a208c0</id>
<content type='text'>
Document CPU Control Processor (CPUCP) mailbox controller for Qualcomm
SM8750 SoCs. It is software compatible with X1E80100 CPUCP mailbox
controller hence fallback to it.

Signed-off-by: Jagadeesh Kona &lt;jagadeesh.kona@oss.qualcomm.com&gt;
Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20251211-sm8750-cpufreq-v1-1-394609e8d624@oss.qualcomm.com
Signed-off-by: Bjorn Andersson &lt;andersson@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: Remove extra blank lines</title>
<updated>2025-11-17T17:24:50Z</updated>
<author>
<name>Rob Herring (Arm)</name>
<email>robh@kernel.org</email>
</author>
<published>2025-10-23T14:37:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0b2333183ade2bad21a7ed7b16b93d87d0a83043'/>
<id>urn:sha1:0b2333183ade2bad21a7ed7b16b93d87d0a83043</id>
<content type='text'>
Generally at most 1 blank line is the standard style for DT schema
files. Remove the few cases with more than 1 so that the yamllint check
for this can be enabled.

Acked-by: Lee Jones &lt;lee@kernel.org&gt;
Reviewed-by: Mathieu Poirier &lt;mathieu.poirier@linaro.org&gt; # remoteproc
Acked-by: Georgi Djakov &lt;djakov@kernel.org&gt;
Acked-by: Vinod Koul &lt;vkoul@kernel.org&gt;
Acked-by: Andi Shyti &lt;andi.shyti@kernel.org&gt;
Acked-by: Bartosz Golaszewski &lt;bartosz.golaszewski@linaro.org&gt;
Acked-by: Jonathan Cameron &lt;jonathan.cameron@huawei.com&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Acked-by: Uwe Kleine-König &lt;ukleinek@kernel.org&gt; # for allwinner,sun4i-a10-pwm.yaml
Reviewed-by: Miquel Raynal &lt;miquel.raynal@bootlin.com&gt; # mtd
Acked-by: Guenter Roeck &lt;linux@roeck-us.net&gt;
Acked-by: Mark Brown &lt;broonie@kernel.org&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Acked-by: Sebastian Reichel &lt;sebastian.reichel@collabora.com&gt;
Acked-by: Manivannan Sadhasivam &lt;mani@kernel.org&gt; # For PCI controller bindings
Link: https://patch.msgid.link/20251023143957.2899600-1-robh@kernel.org
Signed-off-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
</content>
</entry>
</feed>
