linux/Documentation/devicetree/bindings/pinctrl, branch master

Merge tag 'pinctrl-v7.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl

2026-04-18T23:59:09Z

Pull pin control updates from Linus Walleij: "Core changes: - Perform basic checks on pin config properties so as not to allow directly contradictory settings such as setting a pin to more than one bias or drive mode - Handle input-threshold-voltage-microvolt property - Introduce pinctrl_gpio_get_config() handling in the core for SCMI GPIO using pin control New drivers: - GPIO-by-pin control driver (also appearing in the GPIO pull request) fulfilling a promise on a comment from Grant Likely many years ago: "can't GPIO just be a front-end for pin control?" it turns out it can, if and only if you design something new from scratch, such as SCMI - Broadcom BCM7038 as a pinctrl-single delegate - Mobileye EyeQ6Lplus OLB pin controller - Qualcomm Eliza and Hawi families TLMM pin controllers - Qualcomm SDM670 and Milos family LPASS LPI pin controllers - Qualcomm IPQ5210 pin controller - Realtek RTD1625 pin controller support - Rockchip RV1103B pin controller support - Texas Instruments AM62L as a pinctrl-single delegate Improvements: - Set config implementation for the Spacemit K1 pin controller" * tag 'pinctrl-v7.1-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (84 commits) pinctrl: qcom: Add Hawi pinctrl driver dt-bindings: pinctrl: qcom: Describe Hawi TLMM block dt-bindings: pinctrl: pinctrl-max77620: convert to DT schema pinctrl: single: Add bcm7038-padconf compatible matching dt-bindings: pinctrl: pinctrl-single: Add brcm,bcm7038-padconf dt-bindings: pinctrl: apple,pinctrl: Add t8122 compatible pinctrl: qcom: sdm670-lpass-lpi: label variables as static pinctrl: sophgo: pinctrl-sg2044: Fix wrong module description pinctrl: sophgo: pinctrl-sg2042: Fix wrong module description pinctrl: qcom: add sdm670 lpi tlmm dt-bindings: pinctrl: qcom: Add SDM670 LPASS LPI pinctrl dt-bindings: qcom: lpass-lpi-common: add reserved GPIOs property pinctrl: qcom: Introduce IPQ5210 TLMM driver dt-bindings: pinctrl: qcom: add IPQ5210 pinctrl pinctrl: qcom: Drop redundant intr_target_reg on modern SoCs pinctrl: qcom: eliza: Fix interrupt target bit pinctrl: core: Don't use "proxy" headers pinctrl: amd: Support new ACPI ID AMDI0033 pinctrl: renesas: rzg2l: Drop superfluous blank line pinctrl: renesas: rzg2l: Fix save/restore of {IOLH,IEN,PUPD,SMT} registers ...

dt-bindings: pinctrl: qcom: Describe Hawi TLMM block

2026-04-09T08:52:34Z

The Top Level Mode Multiplexer (TLMM) in the Qualcomm Hawi SoC provides GPIO and pinctrl functionality for UFS, SDC and 226 GPIO pins. Add a DeviceTree binding to describe the TLMM block on Qualcomm's Hawi SoC. Signed-off-by: Mukesh Ojha Reviewed-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij

dt-bindings: pinctrl: pinctrl-max77620: convert to DT schema

2026-04-09T08:46:20Z

Convert pinctrl-max77620 devicetree bindings for the MAX77620 PMIC from TXT to YAML format. This patch does not change any functionality; the bindings remain the same. Signed-off-by: Svyatoslav Ryhel Reviewed-by: Rob Herring (Arm) Signed-off-by: Linus Walleij

dt-bindings: pinctrl: pinctrl-single: Add brcm,bcm7038-padconf

2026-04-09T08:31:09Z

Add the "brcm,bcm7038-padconf" compatible to the pinctrl-single binding. Signed-off-by: Florian Fainelli Acked-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij

dt-bindings: pinctrl: apple,pinctrl: Add t8122 compatible

2026-04-09T08:27:20Z

The pin controller on the Apple silicon t8122 (M3) SoC is compatible with the existing driver. Add "apple,t8122-pinctrl" as SoC specific compatible under "apple,t8103-pinctrl" used by the driver. Signed-off-by: Janne Grunau Acked-by: Rob Herring (Arm) Reviewed-by: Linus Walleij Reviewed-by: Neal Gompa Reviewed-by: Joshua Peisach Signed-off-by: Linus Walleij

dt-bindings: pinctrl: qcom: Add SDM670 LPASS LPI pinctrl

2026-04-07T07:01:49Z

Add the pin controller for the audio Low-Power Island (LPI) on SDM670. Signed-off-by: Richard Acayan Reviewed-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij

dt-bindings: qcom: lpass-lpi-common: add reserved GPIOs property

2026-04-07T07:01:44Z

There can be reserved GPIOs on the LPASS LPI pin controller to possibly control sensors. Add the property for reserved GPIOs so they can be avoided appropriately. Adapted from the same entry in qcom,tlmm-common.yaml. Signed-off-by: Richard Acayan Reviewed-by: Krzysztof Kozlowski Signed-off-by: Linus Walleij

dt-bindings: pinctrl: qcom: add IPQ5210 pinctrl

2026-03-30T08:41:05Z

Add device tree bindings for IPQ5210 TLMM block. Reviewed-by: Bjorn Andersson Reviewed-by: Krzysztof Kozlowski Signed-off-by: Kathiravan Thirumoorthy Signed-off-by: Linus Walleij

Merge tag 'renesas-pinctrl-for-v7.1-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel

2026-03-28T16:14:58Z

pinctrl: renesas: Updates for v7.1 - Add pin configuration support for RZ/T2H and RZ/N2H, - Fix save/restore of registers for ports with variable pincfg per pin on RZ/G3E, RZ/V2H(P), RZ/V2N, and RZ/Five, - Drop a superfluous blank line. Signed-off-by: Linus Walleij

dt-bindings: pinctrl: renesas,r9a09g077: Document pin configuration properties

2026-03-26T19:03:16Z

Document the pin configuration properties supported by the RZ/T2H pinctrl driver. The RZ/T2H SoC allows configuring several electrical characteristics through the DRCTLm (I/O Buffer Function Switching) registers. These registers control drive strength, bias configuration, Schmitt trigger input, and output slew rate. Signed-off-by: Lad Prabhakar Acked-by: Conor Dooley Reviewed-by: Linus Walleij Reviewed-by: Geert Uytterhoeven Link: https://patch.msgid.link/20260319141515.2053556-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven