<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/Documentation/devicetree/bindings/serial, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-04-19T15:44:41Z</updated>
<entry>
<title>Merge tag 'tty-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty</title>
<updated>2026-04-19T15:44:41Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-04-19T15:44:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=73398c2772d04ee656a654c63db85851381cd147'/>
<id>urn:sha1:73398c2772d04ee656a654c63db85851381cd147</id>
<content type='text'>
Pull tty/serial updates from Greg KH:
 "Here is the set of tty and serial driver changes for 7.1-rc1.

  Not much here this cycle, biggest thing is the removal of an old
  driver that never got any actual hardware support (esp32), and the
  second try to moving the tty ports to their own workqueues (first try
  was in 7.0-rc1 but was reverted due to problems)

  Otherwise it's just a small set of driver updates and some vt modifier
  key enhancements.

  All have been in linux-next for a while with no reported issues"

* tag 'tty-7.1-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty: (35 commits)
  tty: serial: ip22zilog: Fix section mispatch warning
  hvc/xen: Check console connection flag
  serial: sh-sci: Add support for RZ/G3L RSCI
  dt-bindings: serial: renesas,rsci: Document RZ/G3L SoC
  tty: atmel_serial: update outdated reference to atmel_tasklet_func()
  serial: xilinx_uartps: Drop unused include
  serial: qcom-geni: drop stray newline format specifier
  serial: 8250: loongson: Enable building on MIPS Loongson64
  dt-bindings: serial: 8250: Add Loongson 3A4000 uart compatible
  serial: 8250_fintek: Add support for F81214E
  tty: tty_port: add workqueue to flip TTY buffer
  vt: support ITU-T T.416 color subparameters
  serial: qcom-geni: Fix RTS behavior with flow control
  tty: serial: imx: keep dma request disabled before dma transfer setup
  tty: serial: 8250: Add SystemBase Multi I/O cards
  serial: pic32_uart: allow driver to be compiled on all architectures with COMPILE_TEST
  serial: tegra: remove Kconfig dependency on APB DMA controller
  dt-bindings: serial: amlogic,meson-uart: Add compatible string for A9
  dt-bindings: serial: atmel,at91-usart: add microchip,lan9691-usart
  serial: auart: check clk_enable() return in console write
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2026-04-17T03:28:48Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-04-17T03:28:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e65f4718a577fcc84d40431f022985898b6dbf2e'/>
<id>urn:sha1:e65f4718a577fcc84d40431f022985898b6dbf2e</id>
<content type='text'>
Pull SoC devicetree updates from Arnd Bergmann:
 "A number of SoC platforms are adding modernized variants of their
  already supported chips time, with a total of 12 new SoCs, and two
  older SoC getting removed:

   - Qualcomm Glymur is a compute SoC using 18 Oryon-2 CPU cores
   - Qualcomm Mahua is a variant of Glymur with only 12 CPU cores, but
     largely identical.
   - Qualcomm Eliza is an embeded platform for mobile phone (SM7750) and
     IOT (QC7790S/M) workloads
   - Qualcomm IPQ5210 is a wireless networking SoC using Cortex-A53
     cores
   - Qualcomm apq8084 and ipq806x had only rudimentary support but no
     actual products using them, so they are now gone.
   - Axis ARTPEC-9 is a follow-up to the ARTPEC-8 embedded SoC, using
     the Samsung SoC platform but now with Cortex-A55 cores
   - ARM Zena is a virtual platform in FVP using Cortex-A720AE cores,
     with additional versions planned to be merged in the future.
   - ARM corstone-1000-a320 is a reference platform for IOT, using
     low-end Cortex-A320 cores
   - Microchip LAN9691 is an updated 64-bit variant of the arm32 lan966x
     series of networking SoCs
   - Microchip PIC64GX is an embedded RISC-V chip using SIFIVE U54 CPU
     cores
   - Rockchip RV1103B is the low-end 32-bit single-core vision processor
   - Renesas RZ/G3L (r9a08g046) is an industrial embedded chip using
     Cortex-A55 cores, similar to the G3E and G3S variants we already
     supported.
   - NXP S32N79 is an automotive SoC using Cortex-A78AE cores, a
     significant upgrade from the older S32V and S32G series

  These all come with at least one reference board or an initial product
  using these, in total there are 67 newly added boards. The ones for
  already supported SoCs are:

   - Two more Aspeed BMC based boards
   - Three older tablets based on 32-bit OMAP4 and Exynos5 SoCs
   - One Set-top-box based on Allwinner H6
   - 22 additional industrial/embedded boards using 64-bit NXP i.MX8M or
     i.MX9 SoCs
   - 20 Qualcomm SoC based machines across all possible markets:
     workstation, gaming, laptop, phone, networking, reference, ...
   - Three more Rockchips rk35xx based boards
   - Four variants of the Toradex Verdin using TI AM62

  Other notable bits are:

   - A cleanup for the 32-bit Tegra paz00 board moved the last board
     specific code on Tegra into equivalent dts syntax.
   - There continues to be a significant number of fixes for static
     checking of dtc syntax, but it feels like this is slowing down,
     hopefully getting into a state where most known issues are
     addressed
   - Additional hardware support for many existing boards across SoC
     families, notably Qualcomm, Broadcom, i.MX2, i.MX6, Rockchips,
     STM32, Mediatek, Tegra, TI and Microchip"

* tag 'soc-dt-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (841 commits)
  arm64: dts: ti: k3: Use memory-region-names for r5f
  ARM: dts: imx: Add DT overlays for DH i.MX6 DHCOM SoM and boards
  ARM: dts: imx6sx: remove fallback compatible string fsl,imx28-lcdif
  ARM: dts: imx25: rename node name tcq to touchscreen
  ARM: dts: imx: b850v3: Disable unused usdhc4
  ARM: dts: imx: b850v3: Define GPIO line names
  ARM: dts: imx: b850v3: Use alphabetical sorting
  ARM: dts: imx: bx50v3: Configure phy-mode to eliminate a warning
  ARM: dts: imx: bx50v3: Configure switch PHY max-speed to 100Mbps
  ARM: dts: imx7ulp: Add CPU clock and OPP table support
  ARM: dts: imx7-mba7: Deassert BOOT_EN after boot
  ARM: dts: tqma7: add boot phase properties
  ARM: dts: imx7s: add boot phase properties
  ARM: dts: tqma6ul[l]: correct spelling of TQ-Systems
  ARM: dts: mba6ulx: add boot phase properties
  ARM: dts: imx6ul[l]-tqma6ul[l]: add boot phase properties
  ARM: dts: imx6ul/imx6ull: add boot phase properties
  ARM: dts: imx6qdl-mba6: add boot phase properties
  ARM: dts: imx6qdl-tqma6: add boot phase properties
  ARM: dts: imx6qdl: add boot phase properties
  ...
</content>
</entry>
<entry>
<title>dt-bindings: serial: Document the graph port</title>
<updated>2026-03-31T07:48:43Z</updated>
<author>
<name>Manivannan Sadhasivam</name>
<email>manivannan.sadhasivam@oss.qualcomm.com</email>
</author>
<published>2026-03-26T08:06:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1785c7bc1495e4e22377edffaf0ff8c3c697647d'/>
<id>urn:sha1:1785c7bc1495e4e22377edffaf0ff8c3c697647d</id>
<content type='text'>
A serial controller could be connected to an external connector like PCIe
M.2 for controlling the serial interface of the card. Hence, document the
OF graph port.

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Reviewed-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
Signed-off-by: Manivannan Sadhasivam &lt;manivannan.sadhasivam@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260326-pci-m2-e-v7-4-43324a7866e6@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski &lt;bartosz.golaszewski@oss.qualcomm.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: renesas,rsci: Document RZ/G3L SoC</title>
<updated>2026-03-30T15:36:58Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2026-03-12T08:26:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6672462c97ed29f1cf04317663ae0bffff261c3b'/>
<id>urn:sha1:6672462c97ed29f1cf04317663ae0bffff261c3b</id>
<content type='text'>
Document the serial communication interface (RSCI) used on the Renesas
RZ/G3L (R9A08G046) SoC. This SoC integrates the same RSCI IP block as
the RZ/G3E (R9A09G047), but it has 3 clocks compared to 6 clocks on
the RZ/G3E SoC. The RZ/G3L has a single TCLK with internal dividers,
whereas the RZ/G3E has explicit clocks for TCLK and its dividers.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://patch.msgid.link/20260312082708.98835-2-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: 8250: Add Loongson 3A4000 uart compatible</title>
<updated>2026-03-30T15:36:20Z</updated>
<author>
<name>Rong Zhang</name>
<email>rongrong@oss.cipunited.com</email>
</author>
<published>2026-03-15T18:42:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=17fb51a90efc0b0f756c52bed241d17cfedd0cab'/>
<id>urn:sha1:17fb51a90efc0b0f756c52bed241d17cfedd0cab</id>
<content type='text'>
The UART controller on Loongson 3A4000 is compatible with Loongson
2K1500, which is NS16550A-compatible with an additional fractional
frequency divisor register.

Add loongson,ls3a4000-uart as compatible with loongson,ls2k1500-uart.

Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Rong Zhang &lt;rongrong@oss.cipunited.com&gt;
Reviewed-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Link: https://patch.msgid.link/20260315184301.412844-2-rongrong@oss.cipunited.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: 8250: spacemit: fix clock property for K3 SoC</title>
<updated>2026-03-13T11:14:42Z</updated>
<author>
<name>Yixun Lan</name>
<email>dlan@kernel.org</email>
</author>
<published>2026-03-04T07:19:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=606a6b8bca570aa4f838ddd410345a2937bd98eb'/>
<id>urn:sha1:606a6b8bca570aa4f838ddd410345a2937bd98eb</id>
<content type='text'>
The UART of SpacemiT K3 SoC has same clock property as K1 generation which
request two clock sources, fix the binding otherwise will get DT check
warnings.

Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Acked-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Link: https://lore.kernel.org/r/20260304-01-uart-clock-names-v1-1-338483f04a8b@kernel.org
Signed-off-by: Yixun Lan &lt;dlan@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: amlogic,meson-uart: Add compatible string for A9</title>
<updated>2026-03-12T14:24:42Z</updated>
<author>
<name>Xianwei Zhao</name>
<email>xianwei.zhao@amlogic.com</email>
</author>
<published>2026-03-03T10:05:24Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=579ab531225e25f50848109a0e7238dc86803088'/>
<id>urn:sha1:579ab531225e25f50848109a0e7238dc86803088</id>
<content type='text'>
Amlogic A9 SoCs uses the same UART controller as S4 SoCs.
There is no need for an extra compatible line in the driver,
but add A9 compatible line for documentation.

Reviewed-by: Martin Blumenstingl &lt;martin.blumenstingl@googlemail.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Signed-off-by: Xianwei Zhao &lt;xianwei.zhao@amlogic.com&gt;
Link: https://patch.msgid.link/20260303-serial-binding-v1-1-c3df2a8f6fa3@amlogic.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: atmel,at91-usart: add microchip,lan9691-usart</title>
<updated>2026-03-12T14:24:35Z</updated>
<author>
<name>Robert Marko</name>
<email>robert.marko@sartura.hr</email>
</author>
<published>2026-03-02T11:20:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0e5cb010e37d24a03d3e3a3565900cba4df8a7f0'/>
<id>urn:sha1:0e5cb010e37d24a03d3e3a3565900cba4df8a7f0</id>
<content type='text'>
Document Microchip LAN969x USART compatible.

Signed-off-by: Robert Marko &lt;robert.marko@sartura.hr&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Claudiu Beznea &lt;claudiu.beznea@tuxon.dev&gt;
Link: https://patch.msgid.link/20260302112153.464422-2-robert.marko@sartura.hr
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: snps-dw-apb-uart: Add RV1103B compatible</title>
<updated>2026-03-12T14:06:21Z</updated>
<author>
<name>Fabio Estevam</name>
<email>festevam@nabladev.com</email>
</author>
<published>2026-03-10T00:06:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cd5e64c0bca25be6d1b779858a2d10aebc4976a3'/>
<id>urn:sha1:cd5e64c0bca25be6d1b779858a2d10aebc4976a3</id>
<content type='text'>
The RV1103B UART is compatible with the existing DesignWare APB UART
binding. Add the rockchip,rv1103b-uart compatible string.

Signed-off-by: Fabio Estevam &lt;festevam@nabladev.com&gt;
Acked-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Reviewed-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Link: https://patch.msgid.link/20260310000606.415206-1-festevam@gmail.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: serial: renesas,scif: Document RZ/G3L SoC</title>
<updated>2026-01-23T16:24:51Z</updated>
<author>
<name>Biju Das</name>
<email>biju.das.jz@bp.renesas.com</email>
</author>
<published>2026-01-20T12:52:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b05bebaa60e4e58f36631f41a73716edd8c56d3e'/>
<id>urn:sha1:b05bebaa60e4e58f36631f41a73716edd8c56d3e</id>
<content type='text'>
Add SCIF binding documentation for Renesas RZ/G3L SoC. SCIF block on the
RZ/G3L is identical to one found on the RZ/G3S SoC.

Signed-off-by: Biju Das &lt;biju.das.jz@bp.renesas.com&gt;
Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Reviewed-by: Fabrizio Castro &lt;fabrizio.castro.jz@renesas.com&gt;
Link: https://patch.msgid.link/20260120125232.349708-2-biju.das.jz@bp.renesas.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
