<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/Documentation/devicetree/bindings/soc, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-04-17T15:53:23Z</updated>
<entry>
<title>Merge tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux</title>
<updated>2026-04-17T15:53:23Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-04-17T15:53:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d730905bc3c0075275b2d109cd971735274b98c0'/>
<id>urn:sha1:d730905bc3c0075275b2d109cd971735274b98c0</id>
<content type='text'>
Pull MIPS updates from Thomas Bogendoerfer:

 - Support for Mobileye EyeQ6Lplus

 - Cleanups and fixes

* tag 'mips_7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (30 commits)
  MIPS/mtd: Handle READY GPIO in generic NAND platform data
  MIPS/input: Move RB532 button to GPIO descriptors
  MIPS: validate DT bootargs before appending them
  MIPS: Alchemy: Remove unused forward declaration
  MAINTAINERS: Mobileye: Add EyeQ6Lplus files
  MIPS: config: add eyeq6lplus_defconfig
  MIPS: Add Mobileye EyeQ6Lplus evaluation board dts
  MIPS: Add Mobileye EyeQ6Lplus SoC dtsi
  clk: eyeq: Add Mobileye EyeQ6Lplus OLB
  clk: eyeq: Adjust PLL accuracy computation
  clk: eyeq: Skip post-divisor when computing PLL frequency
  pinctrl: eyeq5: Add Mobileye EyeQ6Lplus OLB
  pinctrl: eyeq5: Use match data
  reset: eyeq: Add Mobileye EyeQ6Lplus OLB
  MIPS: Add Mobileye EyeQ6Lplus support
  dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB
  dt-bindings: mips: Add Mobileye EyeQ6Lplus SoC
  MIPS: dts: loongson64g-package: Switch to Loongson UART driver
  mips: pci-mt7620: rework initialization procedure
  mips: pci-mt7620: add more register init values
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc</title>
<updated>2026-04-17T03:34:34Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-04-17T03:34:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=31b43c079f9aa55754c20404a42bca9a49e01f60'/>
<id>urn:sha1:31b43c079f9aa55754c20404a42bca9a49e01f60</id>
<content type='text'>
Pull SoC driver updates from Arnd Bergmann:
 "The driver updates again are all over the place with many minor fixes
  going into platform specific code. The most notable changes are:

   - Support for Microchip pic64gx system controllers
   - Work on cleaning up devicetree bindings for SoC drivers, and
     converting them into the new format
   - Lots of smaller changes for Qualcomm SoC drivers, including support
     for a number of newly supported chips
   - reset controller API cleanups and a new driver for Cix Sky1
   - Reworks of the Tegra PMC and CBB drivers, along with a change to
     how individual Tegra SoCs get selected in Kconfig and BPMP firmware
     driver updates including a refresh of the ABI header to match the
     version used by firmware
   - STM32 updates to the firewall bus driver and support for the debug
     bus through OP-TEE
   - SCMI firmware driver improvements for reliability, in particular
     for dealing with broken firmware interrupts
   - Memory driver updates for Tegra, and a patch to remove the unused
     Baikal T1 driver"

* tag 'soc-drivers-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (193 commits)
  firmware: arm_ffa: Use the correct buffer size during RXTX_MAP
  firmware: qcom: scm: Allow QSEECOM on Lenovo IdeaCentre Mini X
  clk: spear: fix resource leak in clk_register_vco_pll()
  reset: rzv2h-usb2phy: Add support for VBUS mux controller registration
  reset: rzv2h-usb2phy: Convert to regmap API
  dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset
  dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property
  soc: microchip: add mpfs gpio interrupt mux driver
  dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux
  gpio: mpfs: Add interrupt support
  soc: qcom: ubwc: add helpers to get programmable values
  soc: qcom: ubwc: add helper to get min_acc length
  firmware: qcom: scm: Register gunyah watchdog device
  soc: qcom: socinfo: Add SoC ID for SA8650P
  dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P
  firmware: qcom: scm: Allow QSEECOM on Mahua CRD
  soc: qcom: wcnss: simplify allocation of req
  soc: qcom: pd-mapper: Add support for Eliza
  soc: qcom: aoss: compare against normalized cooling state
  soc: qcom: llcc: fix v1 SB syndrome register offset
  ...
</content>
</entry>
<entry>
<title>dt-bindings: soc: mobileye: Add EyeQ6Lplus OLB</title>
<updated>2026-04-13T13:31:40Z</updated>
<author>
<name>Benoît Monin</name>
<email>benoit.monin@bootlin.com</email>
</author>
<published>2026-03-16T15:25:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4434c3896fab5f284469182a3cdf7cd46a7f11ce'/>
<id>urn:sha1:4434c3896fab5f284469182a3cdf7cd46a7f11ce</id>
<content type='text'>
The "Other Logic Block" found in the EyeQ6Lplus from Mobileye provides
various functions for the controllers present in the SoC.

The OLB produces 22 clocks derived from its input, which is connected
to the main oscillator of the SoC.

It provides reset signals via two reset domains.

It also controls 32 pins to be either a GPIO or an alternate function.

Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Signed-off-by: Benoît Monin &lt;benoit.monin@bootlin.com&gt;
Reviewed-by: Linus Walleij &lt;linusw@kernel.org&gt;
Acked-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'riscv-soc-drivers-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/drivers</title>
<updated>2026-04-11T08:31:20Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2026-04-11T08:31:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ecaf3a92fb86d8ddfc47f228374e22d33a502fff'/>
<id>urn:sha1:ecaf3a92fb86d8ddfc47f228374e22d33a502fff</id>
<content type='text'>
RISC-V soc drivers for v7.1

Microchip:
Add coverage for the pic64gx in the system controller and syscons.
Add a interrupt mux driver (akin to the one that Renesas recently added)
that fixes a problem where the platform never properly modelled gpio
interrupts. There's a gpio driver change here that Bartosz has acked
that adds the interrupt support to the GPIO driver itself.

Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;

* tag 'riscv-soc-drivers-for-v7.1' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  soc: microchip: add mpfs gpio interrupt mux driver
  dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux
  gpio: mpfs: Add interrupt support
  soc: microchip: mpfs-sys-controller: add support for pic64gx
  dt-bindings: soc: microchip: mpfs-sys-controller: Add pic64gx compatibility
  dt-bindings: soc: microchip: add compatible for the mss-top-sysreg on pic64gx

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
</content>
</entry>
<entry>
<title>dt-bindings: soc: mobileye: OLB is an Ethernet PHY provider on EyeQ5</title>
<updated>2026-04-06T12:04:17Z</updated>
<author>
<name>Théo Lebrun</name>
<email>theo.lebrun@bootlin.com</email>
</author>
<published>2026-02-25T16:55:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7d1b6b70927e0b65e2768c3f625f9da60635efad'/>
<id>urn:sha1:7d1b6b70927e0b65e2768c3f625f9da60635efad</id>
<content type='text'>
OLB on EyeQ5 ("mobileye,eyeq5-olb" compatible) is now declared as a
generic PHY provider. Under the hood, it provides Ethernet RGMII/SGMII
PHY support for both MAC instances.

Acked-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
Signed-off-by: Théo Lebrun &lt;theo.lebrun@bootlin.com&gt;
Signed-off-by: Thomas Bogendoerfer &lt;tsbogend@alpha.franken.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'qcom-drivers-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers</title>
<updated>2026-04-02T21:19:52Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2026-04-02T21:19:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a66cc657ef52c7b9028b4d4d79af7b7ce31b32f2'/>
<id>urn:sha1:a66cc657ef52c7b9028b4d4d79af7b7ce31b32f2</id>
<content type='text'>
Qualcomm driver updates for v7.1

Add ECS LIVA QC710, Glymur CRD, Mahua CRD, Purwa IoT EVK, and Asus
Vivobook to the QSEECOM allow-list, to enable UEFI variable access
through uefisecapp.

Register the Gunyah watchdog device if the SCM driver finds itself
running under Gunyah. Clean up some locking using guards.

Handle possible cases where AOSS cooling state is given a non-boolean
state.

Replace LLCC per-slice activation bitmap with reference counting. Also
add SDM670 support.

Improve probe deferral handling in the OCMEM driver.

Add Milos, QCS615, Eliza, Glymur, and Mahua support to the pd-mapper.

Add support for SoCCP-based pmic-glink, as found in Glymur and
Kaanapali.

Add common QMI service ids to the main qmi headerfile, to avoid
spreading these constants in various drivers.

Add support for version 2 of SMP2P and implement the irqchip state
reading support.

Add CQ7790, SA8650P, SM7450, SM7450P, and IPQ5210 SoC and the PM7550BA
PMIC identifiers to the socinfo driver.

Add Eliza and Mahua support to the UBWC driver, introduce helpers for
drivers to read out min_acc length and other programmable values, and
disable bank swizzling for Glymur.

Simplify the logic related to allocation of NV download request in the
WCNSS control driver.

* tag 'qcom-drivers-for-7.1' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits)
  soc: qcom: ubwc: add helpers to get programmable values
  soc: qcom: ubwc: add helper to get min_acc length
  firmware: qcom: scm: Register gunyah watchdog device
  soc: qcom: socinfo: Add SoC ID for SA8650P
  dt-bindings: arm: qcom,ids: Add SoC ID for SA8650P
  firmware: qcom: scm: Allow QSEECOM on Mahua CRD
  soc: qcom: wcnss: simplify allocation of req
  soc: qcom: pd-mapper: Add support for Eliza
  soc: qcom: aoss: compare against normalized cooling state
  soc: qcom: llcc: fix v1 SB syndrome register offset
  dt-bindings: firmware: qcom,scm: Document ipq9650 SCM
  soc: qcom: ubwc: Add support for Mahua
  soc: qcom: pd-mapper: Add support for Glymur and Mahua
  soc: qcom: ubwc: Add configuration Eliza SoC
  soc: qcom: ubwc: Remove redundant x1e80100_data
  dt-bindings: firmware: qcom,scm: document Eliza SCM Firmware Interface
  soc: qcom: ocmem: return -EPROBE_DEFER is ocmem is not available
  soc: qcom: ocmem: register reasons for probe deferrals
  soc: qcom: ocmem: make the core clock optional
  soc: qcom: ubwc: disable bank swizzling for Glymur platform
  ...

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'reset-for-v7.1' of https://git.pengutronix.de/git/pza/linux into soc/drivers</title>
<updated>2026-04-02T21:15:27Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2026-04-02T21:15:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fbf57f25f032bfccbf74eb1898646c9fbd862d2f'/>
<id>urn:sha1:fbf57f25f032bfccbf74eb1898646c9fbd862d2f</id>
<content type='text'>
Reset controller updates for v7.1

* Rework the reset core to support firmware nodes, add more fine
  grained locking, and use guard() helpers.
* Change the reset-gpio driver to use firmware nodes.
* Add support for the Cix Sky1 SoC reset controller.
* Add support for the RZ/G3E SoC to the reset-rzv2h-usb2phy driver and
  convert it to regmap. Prepare registering a VBUS mux controller.
* Replace use of the deprecated register_restart_handler() function in
  the ath79, intel-gw, lpc18xx, ma35d1, npcm, and sunplus reset drivers.
* Combine two allocations into one in the sti/reset-syscfg driver.
* Fix the reset-rzg2l-usbphy-ctrl MODULE_AUTHOR email.
* Fix the reset_control_rearm() kerneldoc comment.

The last commit is a merge of reset-fixes-for-v7.0-2 into reset/next,
to solve a merge conflict between commits a9b95ce36de4 ("reset: gpio: add a
devlink between reset-gpio and its consumer") and fbffb8c7c7bb ("reset: gpio:
fix double free in reset_add_gpio_aux_device() error path").

* tag 'reset-for-v7.1' of https://git.pengutronix.de/git/pza/linux: (35 commits)
  reset: rzv2h-usb2phy: Add support for VBUS mux controller registration
  reset: rzv2h-usb2phy: Convert to regmap API
  dt-bindings: reset: renesas,rzv2h-usb2phy: Document RZ/G3E USB2PHY reset
  dt-bindings: reset: renesas,rzv2h-usb2phy: Add '#mux-state-cells' property
  reset: core: Drop unnecessary double quote
  reset: rzv2h-usb2phy: Keep PHY clock enabled for entire device lifetime
  reset: spacemit: k3: Decouple composite reset lines
  reset: gpio: fix double free in reset_add_gpio_aux_device() error path
  reset: rzg2l-usbphy-ctrl: Fix malformed MODULE_AUTHOR string
  reset: sti: kzalloc + kcalloc to kzalloc
  reset: don't overwrite fwnode_reset_n_cells
  reset: core: Fix indentation
  reset: add Sky1 soc reset support
  dt-bindings: soc: cix: document the syscon on Sky1 SoC
  reset: gpio: make the driver fwnode-agnostic
  reset: convert reset core to using firmware nodes
  reset: convert the core API to using firmware nodes
  reset: convert of_reset_control_get_count() to using firmware nodes
  reset: protect struct reset_control with its own mutex
  reset: protect struct reset_controller_dev with its own mutex
  ...

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'imx-bindings-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux into soc/drivers</title>
<updated>2026-04-02T21:14:13Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2026-04-02T21:14:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=62513d2213a6af4640342a8959638cbf2a740c13'/>
<id>urn:sha1:62513d2213a6af4640342a8959638cbf2a740c13</id>
<content type='text'>
i.MX dt-bindings update for 7.1:

- New board support: Verdin iMX95, MBa93xxLA-MINI, TQMa95xxLA, S32N79
  SoC/RDB, i.MX8MP audio board (version 2), SolidRun i.MX8M, TQMa8x,
  GOcontroll Moduline IV/Mini, FRDM-IMX91S, Variscite DART-MX91,
  i.MX93 Wireless EVK, Variscite DART-MX95.
- fsl,irqsteer add nxp,s32n79-irqsteer support.
- fsl,imx93-media-blk-ctrl add dbi-bridge.

* tag 'imx-bindings-7.1' of git://git.kernel.org/pub/scm/linux/kernel/git/frank.li/linux:
  dt-bindings: arm: fsl: add Verdin iMX95
  dt-bindings: arm: fsl: add MBa93xxLA-MINI
  dt-bindings: arm: add bindings for TQMa95xxLA
  dt-bindings: arm: lpc: add missed lpc43xx board
  dt-bindings: arm: fsl: Add NXP S32N79 SoC and RDB board
  dt-bindings: interrupt-controller: fsl,irqsteer: add S32N79 support
  dt-bindings: arm: fsl: Add compatible for i.MX8MP audio board (version 2)
  dt-bindings: arm: fsl: Add various solidrun i.MX8M boards
  dt-bindings: arm: fsl: add bindings for TQMa8x
  dt-bindings: fsl: imx7ulp-smc1: Add #clock-cells property
  dt-bindings: arm: fsl: Add GOcontroll Moduline IV/Mini
  dt-bindings: arm: fsl: Add FRDM-IMX91S board
  dt-bindings: arm: fsl: add Variscite DART-MX91 Boards
  dt-bindings: arm: fsl: Add i.MX93 Wireless EVK board
  dt-bindings: arm: fsl: add Variscite DART-MX95 Boards
  dt-bindings: soc: imx93-media-blk-ctrl: Add PDFC subnode to schema and example

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>dt-bindings: soc: microchip: document PolarFire SoC's gpio interrupt mux</title>
<updated>2026-03-31T13:13:14Z</updated>
<author>
<name>Conor Dooley</name>
<email>conor.dooley@microchip.com</email>
</author>
<published>2026-03-18T11:04:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5f3575cc73dc64dc0912d1f8ccf6d00c20aedd5b'/>
<id>urn:sha1:5f3575cc73dc64dc0912d1f8ccf6d00c20aedd5b</id>
<content type='text'>
On PolarFire SoC there are more GPIO interrupts than there are interrupt
lines available on the PLIC, and a runtime configurable mux is used to
decide which interrupts are assigned direct connections to the PLIC &amp;
which are relegated to sharing a line.

Reviewed-by: Herve Codina &lt;herve.codina@bootlin.com&gt;
Reviewed-by: Rob Herring (Arm) &lt;robh@kernel.org&gt;
Reviewed-by: Linus Walleij &lt;linusw@kernel.org&gt;
Signed-off-by: Conor Dooley &lt;conor.dooley@microchip.com&gt;
</content>
</entry>
<entry>
<title>dt-bindings: soc: rockchip: grf: Add RV1103B compatibles</title>
<updated>2026-03-24T16:40:02Z</updated>
<author>
<name>Fabio Estevam</name>
<email>festevam@nabladev.com</email>
</author>
<published>2026-03-13T13:10:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=25c2721f18ff97226a6561aedc9f8f76a51fe2e8'/>
<id>urn:sha1:25c2721f18ff97226a6561aedc9f8f76a51fe2e8</id>
<content type='text'>
Add the PMU GRF and IOC compatible strings for the RV1103B SoC.

Signed-off-by: Fabio Estevam &lt;festevam@nabladev.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;krzysztof.kozlowski@oss.qualcomm.com&gt;
Link: https://patch.msgid.link/20260313131058.708361-1-festevam@gmail.com
Signed-off-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
</content>
</entry>
</feed>
