linux/Documentation/devicetree/bindings/timer, branch v6.17

Merge tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

2025-07-29T18:17:24Z

Pull new SoC support from Arnd Bergmann: "These five newly supported chips come with both devicetree descriptions and the changes to wire them up to the build system for easier bisection. The chips in question are: - Marvell PXA1908 was the first 64-bit mobile phone chip from Marvell in the product line that started with the Digital StrongARM SA1100 based PDAs and continued with the Intel PXA2xx that dominated early smartphones. This one only made it only into a few products before the entire product line was cut in 2015. - The QiLai SoC is made by RISC-V core designer Andes Technologies and is in the 'Voyager' reference board in MicroATX form factor. It uses four in-order AX45MP cores, which is the midrange product from Andes. - CIX P1 is one of the few Arm chips designed for small workstations, and this one uses 12 Cortex-A720/A520 cores, making it also one of the only ARMv9.2 machines that one can but at the moment. - Axiado AX3000 is an embedded chip with relative small Cortex-A53 CPU cores described as a "Trusted Control/Compute Unit" that can be used as a BMC in servers. In addition to the usual I/O, this one comes with 10GBit ethernet and and a 4TOPS NPU. - Sophgo SG2000 is an embedded chip that comes with both RISC-V and Arm cores that can run Linux. This was already supported for RISC-V but now it also works on Arm One more chip, the Black Sesame C1200 did not make it in tirm for the merge window" * tag 'soc-newsoc-6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (38 commits) arm64: defconfig: Enable rudimentary Sophgo SG2000 support arm64: Add SOPHGO SOC family Kconfig support arm64: dts: sophgo: Add Duo Module 01 Evaluation Board arm64: dts: sophgo: Add Duo Module 01 arm64: dts: sophgo: Add initial SG2000 SoC device tree MAINTAINERS: Add entry for Axiado arm64: defconfig: enable the Axiado family arm64: dts: axiado: Add initial support for AX3000 SoC and eval board arm64: add Axiado SoC family dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller dt-bindings: serial: cdns: add Axiado AX3000 UART controller dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant dt-bindings: gpio: cdns: convert to YAML dt-bindings: arm: axiado: add AX3000 EVK compatible strings dt-bindings: vendor-prefixes: Add Axiado Corporation MAINTAINERS: Add CIX SoC maintainer entry arm64: dts: cix: Add sky1 base dts initial support dt-bindings: clock: cix: Add CIX sky1 scmi clock id arm64: defconfig: Enable CIX SoC mailbox: add CIX mailbox driver ...

dt-bindings: timer: via,vt8500-timer: Convert to YAML

2025-07-23T03:45:01Z

Rewrite the textual description for the VIA/WonderMedia timer as YAML schema. The IP can generate up to four interrupts from four respective match registers, so reflect that in the schema. Reviewed-by: Rob Herring (Arm) Signed-off-by: Alexey Charkov Link: https://lore.kernel.org/r/20250521-vt8500-timer-updates-v5-1-7e4bd11df72e@gmail.com Signed-off-by: Rob Herring (Arm)

dt-bindings: timer: add Andes machine timer

2025-07-21T14:51:52Z

Add the DT binding documentation for Andes machine timer. The RISC-V architecture defines a machine timer that provides a real-time counter and generates timer interrupts. Andes machiner timer (PLMT0) is the implementation of the machine timer, and it contains memory-mapped registers (mtime and mtimecmp). This device supports up to 32 cores. Acked-by: Conor Dooley Signed-off-by: Ben Zong-You Xie Link: https://lore.kernel.org/r/20250711133025.2192404-6-ben717@andestech.com Signed-off-by: Arnd Bergmann

Merge tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux

2025-05-29T15:22:07Z

Pull devicetree updates from Rob Herring: "DT Bindings: - Convert all remaining interrupt-controller bindings to DT schema - Convert Rockchip CDN-DP and Freescale TCON, M4IF, TigerP, LDB, PPC PMC, imx-drm, and ftm-quaddec to DT schema - Add bindings for fsl,vf610-pit, fsl,ls1021a-wdt, sgx,vz89te, maxim,max30208, ti,lp8864, and fairphone,fp5-sndcard - Add top-level constraints for renesas,vsp1 and renesas,fcp - Add missing constraint in amlogic,pinctrl-a4 'group' nodes - Adjust the allowed properties for dwc3-xilinx, sony,imx219, pci-iommu, and renesas,dsi - Add EcoNet vendor prefix - Fix the reserved-memory.yaml in fsl,qman-fqd - Drop obsolete numa.txt and cpu-topology.txt which are schemas in dtschema now - Drop Renesas RZ/N1S bindings - Ensure Arm cpu nodes don't allow undocumented properties. Add all the properties which are in use and undocumented. Drop the Mediatek cpufreq binding which is not a binding, but just what DT properties the driver uses. - Add compatibles for Renesas RZ/G3E and RZ/V2N Mali Bifrost GPU - Update documentation on defining child nodes with separate schemas - Add bindings to PSCI MAINTAINERS entry DT core: - Add new functions to simplify driver handling of 'memory-region' properties. Users to be added next cycle. - Simplify of_dma_set_restricted_buffer() to use of_for_each_phandle() - Add missing unlock on error in unittest_data_add()" * tag 'devicetree-for-6.16' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (87 commits) dt-bindings: timer: Add fsl,vf610-pit.yaml dt-bindings: gpu: mali-bifrost: Add compatible for RZ/G3E SoC ASoC: dt-bindings: qcom,sm8250: Add Fairphone 5 sound card dt-bindings: arm/cpus: Allow 2 power-domains entries dt-bindings: usb: dwc3-xilinx: allow dma-coherent media: dt-bindings: sony,imx219: Allow props from video-interface-devices dt-bindings: soundwire: qcom: Document v2.1.0 version of IP block dt-bindings: watchdog: fsl-imx-wdt: add compatible string fsl,ls1021a-wdt dt-bindings: pinctrl: amlogic,pinctrl-a4: Add missing constraint on allowed 'group' node properties dt-bindings: display: rockchip: Convert cdn-dp-rockchip.txt to yaml dt-bindings: display: bridge: renesas,dsi: allow properties from dsi-controller dt-bindings: trivial-devices: Add VZ89TE to trivial media: dt-bindings: renesas,vsp1: add top-level constraints media: dt-bindings: renesas,fcp: add top-level constraints dt-bindings: trivial-devices: Add Maxim max30208 dt-bindings: soc: fsl,qman-fqd: Fix reserved-memory.yaml reference dt-bindings: interrupt-controller: Convert ti,omap-intc-irq to DT schema dt-bindings: interrupt-controller: Convert ti,omap4-wugen-mpu to DT schema dt-bindings: interrupt-controller: Convert ti,keystone-irq to DT schema dt-bindings: interrupt-controller: Convert technologic,ts4800-irqc to DT schema ...

dt-bindings: timer: Add fsl,vf610-pit.yaml

2025-05-28T14:20:59Z

Add binding doc fsl,vf610-pit.yaml to fix below CHECK_DTB warnings: arch/arm/boot/dts/nxp/vf/vf610m4-colibri.dtb: /soc/bus@40000000/pit@40037000: failed to match any schema with compatible: ['fsl,vf610-pit'] Signed-off-by: Frank Li Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20250522205710.502779-1-Frank.Li@nxp.com Signed-off-by: Rob Herring (Arm)

Merge tag 'timers-clocksource-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip

2025-05-27T16:01:26Z

Pull clocksource updates from Thomas Gleixner: "Updates for clocksource/clockevent drivers: - The final conversion of text formatted device tree binding to schemas - A new driver fot the System Timer Module on S32G NXP SoCs - A new driver fot the Econet HPT timer - The usual improvements and device tree binding updates" * tag 'timers-clocksource-2025-05-25' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (31 commits) clocksource/drivers/renesas-ostm: Unconditionally enable reprobe support dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) support dt-bindings: timer: Convert marvell,armada-370-timer to DT schema dt-bindings: timer: Convert ti,keystone-timer to DT schema dt-bindings: timer: Convert st,spear-timer to DT schema dt-bindings: timer: Convert socionext,milbeaut-timer to DT schema dt-bindings: timer: Convert snps,arc-timer to DT schema dt-bindings: timer: Convert snps,archs-rtc to DT schema dt-bindings: timer: Convert snps,archs-gfrc to DT schema dt-bindings: timer: Convert lsi,zevio-timer to DT schema dt-bindings: timer: Convert jcore,pit to DT schema dt-bindings: timer: Convert img,pistachio-gptimer to DT schema dt-bindings: timer: Convert ezchip,nps400-timer to DT schema dt-bindings: timer: Convert cirrus,clps711x-timer to DT schema dt-bindings: timer: Convert altr,timer-1.0 to DT schema dt-bindings: timer: Add ESWIN EIC7700 CLINT clocksource/drivers: Add EcoNet Timer HPT driver dt-bindings: timer: Add EcoNet EN751221 "HPT" CPU Timer dt-bindings: timer: Convert arm,mps2-timer to DT schema dt-bindings: timer: Add Sophgo SG2044 ACLINT timer ...

dt-bindings: timer: renesas,ostm: Document RZ/V2N (R9A09G056) support

2025-05-16T11:33:11Z

Document support for the Renesas OS Timer (OSTM) found on the Renesas RZ/V2N (R9A09G056) SoC. The OSTM IP on RZ/V2N is identical to that on other RZ families, so no driver changes are required as `renesas,ostm` will be used as fallback compatible. Also update the bindings to require the "resets" property for RZ/V2N by inverting the logic: all SoCs except RZ/A1 and RZ/A2 now require the "resets" property. Signed-off-by: Lad Prabhakar Reviewed-by: Geert Uytterhoeven Acked-by: Conor Dooley Link: https://lore.kernel.org/r/20250515182207.329176-2-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Daniel Lezcano

dt-bindings: timer: Convert marvell,armada-370-timer to DT schema

2025-05-16T09:10:34Z

Convert the Marvell Armada 37x/380/XP Timer binding to DT schema format. Update the compatible entries to match what is in use. "marvell,armada-380-timer" in particular was missing. Signed-off-by: Rob Herring (Arm) Reviewed-by: Andrew Lunn Link: https://lore.kernel.org/r/20250506022301.2588282-1-robh@kernel.org Signed-off-by: Daniel Lezcano

dt-bindings: timer: Convert ti,keystone-timer to DT schema

2025-05-16T09:10:34Z

Convert the TI Keystone Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250506022330.2589598-1-robh@kernel.org Signed-off-by: Daniel Lezcano

dt-bindings: timer: Convert st,spear-timer to DT schema

2025-05-16T09:10:34Z

Convert the ST SPEAr Timer binding to DT schema format. It's a straight-forward conversion. Signed-off-by: Rob Herring (Arm) Link: https://lore.kernel.org/r/20250506022326.2589389-1-robh@kernel.org Signed-off-by: Daniel Lezcano