linux/Documentation/process/maintainer-handbooks.rst, branch v6.7

Documentation/process: maintainer-soc: add clean platforms profile

2023-08-12T12:04:51Z

Some SoC platforms require that commits must not bring any new dtbs_check warnings. Maintainers of such platforms usually have some automation set, so any new warning will be spotted sooner or later. Worst case: they run the tests themselves. Document requirements for such platforms, so contributors can expect their patches being dropped or ignored, if they bring new warnings for existing boards. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Conor Dooley Link: https://lore.kernel.org/r/20230723131924.78190-2-krzysztof.kozlowski@linaro.org Signed-off-by: Arnd Bergmann

Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm

2023-07-03T22:32:22Z

Pull kvm updates from Paolo Bonzini: "ARM64: - Eager page splitting optimization for dirty logging, optionally allowing for a VM to avoid the cost of hugepage splitting in the stage-2 fault path. - Arm FF-A proxy for pKVM, allowing a pKVM host to safely interact with services that live in the Secure world. pKVM intervenes on FF-A calls to guarantee the host doesn't misuse memory donated to the hyp or a pKVM guest. - Support for running the split hypervisor with VHE enabled, known as 'hVHE' mode. This is extremely useful for testing the split hypervisor on VHE-only systems, and paves the way for new use cases that depend on having two TTBRs available at EL2. - Generalized framework for configurable ID registers from userspace. KVM/arm64 currently prevents arbitrary CPU feature set configuration from userspace, but the intent is to relax this limitation and allow userspace to select a feature set consistent with the CPU. - Enable the use of Branch Target Identification (FEAT_BTI) in the hypervisor. - Use a separate set of pointer authentication keys for the hypervisor when running in protected mode, as the host is untrusted at runtime. - Ensure timer IRQs are consistently released in the init failure paths. - Avoid trapping CTR_EL0 on systems with Enhanced Virtualization Traps (FEAT_EVT), as it is a register commonly read from userspace. - Erratum workaround for the upcoming AmpereOne part, which has broken hardware A/D state management. RISC-V: - Redirect AMO load/store misaligned traps to KVM guest - Trap-n-emulate AIA in-kernel irqchip for KVM guest - Svnapot support for KVM Guest s390: - New uvdevice secret API - CMM selftest and fixes - fix racy access to target CPU for diag 9c x86: - Fix missing/incorrect #GP checks on ENCLS - Use standard mmu_notifier hooks for handling APIC access page - Drop now unnecessary TR/TSS load after VM-Exit on AMD - Print more descriptive information about the status of SEV and SEV-ES during module load - Add a test for splitting and reconstituting hugepages during and after dirty logging - Add support for CPU pinning in demand paging test - Add support for AMD PerfMonV2, with a variety of cleanups and minor fixes included along the way - Add a "nx_huge_pages=never" option to effectively avoid creating NX hugepage recovery threads (because nx_huge_pages=off can be toggled at runtime) - Move handling of PAT out of MTRR code and dedup SVM+VMX code - Fix output of PIC poll command emulation when there's an interrupt - Add a maintainer's handbook to document KVM x86 processes, preferred coding style, testing expectations, etc. - Misc cleanups, fixes and comments Generic: - Miscellaneous bugfixes and cleanups Selftests: - Generate dependency files so that partial rebuilds work as expected" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (153 commits) Documentation/process: Add a maintainer handbook for KVM x86 Documentation/process: Add a label for the tip tree handbook's coding style KVM: arm64: Fix misuse of KVM_ARM_VCPU_POWER_OFF bit index RISC-V: KVM: Remove unneeded semicolon RISC-V: KVM: Allow Svnapot extension for Guest/VM riscv: kvm: define vcpu_sbi_ext_pmu in header RISC-V: KVM: Expose IMSIC registers as attributes of AIA irqchip RISC-V: KVM: Add in-kernel virtualization of AIA IMSIC RISC-V: KVM: Expose APLIC registers as attributes of AIA irqchip RISC-V: KVM: Add in-kernel emulation of AIA APLIC RISC-V: KVM: Implement device interface for AIA irqchip RISC-V: KVM: Skeletal in-kernel AIA irqchip support RISC-V: KVM: Set kvm_riscv_aia_nr_hgei to zero RISC-V: KVM: Add APLIC related defines RISC-V: KVM: Add IMSIC related defines RISC-V: KVM: Implement guest external interrupt line management KVM: x86: Remove PRIx* definitions as they are solely for user space s390/uv: Update query for secret-UVCs s390/uv: replace scnprintf with sysfs_emit s390/uvdevice: Add 'Lock Secret Store' UVC ...

Documentation/process: Add a maintainer handbook for KVM x86

2023-06-22T21:25:38Z

Add a KVM x86 doc to the subsystem/maintainer handbook section to explain how KVM x86 (currently) operates as a sub-subsystem, and to soapbox on the rules and expectations for contributing to KVM x86. Reviewed-by: Like Xu Link: https://lore.kernel.org/r/20230411171651.1067966-3-seanjc@google.com Signed-off-by: Sean Christopherson

Documentation/process: add soc maintainer handbook

2023-06-06T15:07:17Z

Arnd suggested that adding a maintainer handbook for the SoC "subsystem" would be helpful in trying to bring on board maintainers for the various new platforms cropping up in RISC-V land. Add a document briefly describing the role of the SoC subsystem and some basic advice for (new) platform maintainers. Suggested-by: Arnd Bergmann Reviewed-by: Krzysztof Kozlowski Signed-off-by: Conor Dooley Signed-off-by: Arnd Bergmann

docs: netdev: move the netdev-FAQ to the process pages

2022-03-31T08:49:39Z

The documentation for the tip tree is really in quite a similar spirit to the netdev-FAQ. Move the netdev-FAQ to the process docs as well. Signed-off-by: Jakub Kicinski Reviewed-by: Florian Fainelli Signed-off-by: Paolo Abeni

Documentation/process: Add tip tree handbook

2021-09-14T20:46:49Z

Add a document to the subsystem/maintainer handbook section, which explains what the tip tree is, how it operates and what rules and expectations it has. [ bp: - Add a SPDX identifier, work in most comments from the thread. - 9bf19b78a203 ("Documentation/submitting-patches: Document the SoB chain") is also in the main Documentation but I'm leaving the paragraph here because it has the proper structure - text talks about SoBs and referencing somewhere else would interrupt the flow. - Move backtraces in changelogs to main submitting-patches.rst. - "Patch version information" is explained to a great detail in submitting-patches.rst too. - Hyperlink resend reminders section. ] Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov Reviewed-by: Paul E. McKenney Link: https://lkml.kernel.org/r/20181107171149.165693799@linutronix.de Link: https://lore.kernel.org/r/20210913153942.15251-3-bp@alien8.de Signed-off-by: Jonathan Corbet

Documentation/process: Add maintainer handbooks section

2021-09-14T20:46:49Z

General rules for patch submission, coding style and related details are available, but most subsystems have their subsystem-specific extra rules which differ or go beyond the common rules. Mark suggested to add a subsystem/maintainer handbook section, where subsystem maintainers can explain their specific quirks. Add the section and link to it from the submitting-patches document. [ bp: Add a SPDX identifier. ] Suggested-by: Mark Brown Signed-off-by: Thomas Gleixner Signed-off-by: Borislav Petkov Link: https://lkml.kernel.org/r/20181107171149.074948887@linutronix.de Link: https://lore.kernel.org/r/20210913153942.15251-2-bp@alien8.de Signed-off-by: Jonathan Corbet