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<title>linux/Documentation/virtual, branch v4.11</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.11</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.11'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-04-05T14:27:47Z</updated>
<entry>
<title>Merge tag 'kvm-arm-for-v4.11-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm</title>
<updated>2017-04-05T14:27:47Z</updated>
<author>
<name>Radim Krčmář</name>
<email>rkrcmar@redhat.com</email>
</author>
<published>2017-04-05T14:27:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6fd6410311d618d80748b0a5dd3e8d6cd17662bc'/>
<id>urn:sha1:6fd6410311d618d80748b0a5dd3e8d6cd17662bc</id>
<content type='text'>
From: Christoffer Dall &lt;cdall@linaro.org&gt;

KVM/ARM Fixes for v4.11-rc6

Fixes include:
 - Fix a problem with GICv3 userspace save/restore
 - Clarify GICv2 userspace save/restore ABI
 - Be more careful in clearing GIC LRs
 - Add missing synchronization primitive to our MMU handling code
</content>
</entry>
<entry>
<title>KVM: arm/arm64: vgic: Fix GICC_PMR uaccess on GICv3 and clarify ABI</title>
<updated>2017-04-04T12:33:59Z</updated>
<author>
<name>Christoffer Dall</name>
<email>cdall@linaro.org</email>
</author>
<published>2017-03-21T21:05:22Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6d56111c92d247bb64301029fe88365aa4caf16e'/>
<id>urn:sha1:6d56111c92d247bb64301029fe88365aa4caf16e</id>
<content type='text'>
As an oversight, for GICv2, we accidentally export the GICC_PMR register
in the format of the GICH_VMCR.VMPriMask field in the lower 5 bits of a
word, meaning that userspace must always use the lower 5 bits to
communicate with the KVM device and must shift the value left by 3
places to obtain the actual priority mask level.

Since GICv3 supports the full 8 bits of priority masking in the ICH_VMCR,
we have to fix the value we export when emulating a GICv2 on top of a
hardware GICv3 and exporting the emulated GICv2 state to userspace.

Take the chance to clarify this aspect of the ABI.

Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Christoffer Dall &lt;cdall@linaro.org&gt;
</content>
</entry>
<entry>
<title>KVM: Documentation: document MCE ioctls</title>
<updated>2017-03-20T15:25:06Z</updated>
<author>
<name>Luiz Capitulino</name>
<email>lcapitulino@redhat.com</email>
</author>
<published>2017-03-13T13:08:20Z</published>
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<id>urn:sha1:3aa53859d23e1b9cf1a60f82a9008e35ef10bd6a</id>
<content type='text'>
Signed-off-by: Luiz Capitulino &lt;lcapitulino@redhat.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Signed-off-by: Radim Krčmář &lt;rkrcmar@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: Add documentation for KVM_CAP_NR_MEMSLOTS</title>
<updated>2017-03-09T09:13:20Z</updated>
<author>
<name>Linu Cherian</name>
<email>linu.cherian@cavium.com</email>
</author>
<published>2017-03-08T06:08:32Z</published>
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<id>urn:sha1:a677e7046ab5edb33d051bda60cb3be0d60a48cc</id>
<content type='text'>
Add documentation for KVM_CAP_NR_MEMSLOTS capability.

Reviewed-by: Christoffer Dall &lt;cdall@linaro.org&gt;
Signed-off-by: Linu Cherian &lt;linu.cherian@cavium.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'docs-4.11-fixes' of git://git.lwn.net/linux</title>
<updated>2017-03-04T19:32:18Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-03-04T19:32:18Z</published>
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<id>urn:sha1:be834aafdf5f8a37c191e697ac8ee6d53ab5020c</id>
<content type='text'>
Pull documentation fixes from Jonathan Corbet:
 "A few fixes for the docs tree, including one for a 4.11 build
  regression"

* tag 'docs-4.11-fixes' of git://git.lwn.net/linux:
  Documentation/sphinx: fix primary_domain configuration
  docs: Fix htmldocs build failure
  doc/ko_KR/memory-barriers: Update control-dependencies section
  pcieaer doc: update the link
  Documentation: Update path to sysrq.txt
</content>
</entry>
<entry>
<title>Documentation: Update path to sysrq.txt</title>
<updated>2017-03-03T22:48:38Z</updated>
<author>
<name>Krzysztof Kozlowski</name>
<email>krzk@kernel.org</email>
</author>
<published>2017-02-24T08:42:14Z</published>
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<id>urn:sha1:d3c1a297b6fe60fe7be637cb067b27fca46be504</id>
<content type='text'>
Commit 9d85025b0418 ("docs-rst: create an user's manual book") moved the
sysrq.txt leaving old paths in the kernel docs.

Signed-off-by: Krzysztof Kozlowski &lt;krzk@kernel.org&gt;
Reviewed-by: Mauro Carvalho Chehab &lt;mchehab@s-opensource.com&gt;
Signed-off-by: Jonathan Corbet &lt;corbet@lwn.net&gt;
</content>
</entry>
<entry>
<title>KVM: race-free exit from KVM_RUN without POSIX signals</title>
<updated>2017-02-17T11:27:37Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2017-02-08T10:50:15Z</published>
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<id>urn:sha1:460df4c1fc7c00829050c08d6368dc6e6beef307</id>
<content type='text'>
The purpose of the KVM_SET_SIGNAL_MASK API is to let userspace "kick"
a VCPU out of KVM_RUN through a POSIX signal.  A signal is attached
to a dummy signal handler; by blocking the signal outside KVM_RUN and
unblocking it inside, this possible race is closed:

          VCPU thread                     service thread
   --------------------------------------------------------------
        check flag
                                          set flag
                                          raise signal
        (signal handler does nothing)
        KVM_RUN

However, one issue with KVM_SET_SIGNAL_MASK is that it has to take
tsk-&gt;sighand-&gt;siglock on every KVM_RUN.  This lock is often on a
remote NUMA node, because it is on the node of a thread's creator.
Taking this lock can be very expensive if there are many userspace
exits (as is the case for SMP Windows VMs without Hyper-V reference
time counter).

As an alternative, we can put the flag directly in kvm_run so that
KVM can see it:

          VCPU thread                     service thread
   --------------------------------------------------------------
                                          raise signal
        signal handler
          set run-&gt;immediate_exit
        KVM_RUN
          check run-&gt;immediate_exit

Reviewed-by: Radim Krčmář &lt;rkrcmar@redhat.com&gt;
Reviewed-by: David Hildenbrand &lt;david@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'kvmarm-for-4.11' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD</title>
<updated>2017-02-09T15:01:23Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2017-02-09T15:01:23Z</published>
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<id>urn:sha1:2e751dfb5ffd20d1a31837dbc9718741df69bffe</id>
<content type='text'>
kvmarm updates for 4.11

- GICv3 save restore
- Cache flushing fixes
- MSI injection fix for GICv3 ITS
- Physical timer emulation support
</content>
</entry>
<entry>
<title>Merge tag 'kvm_mips_4.11_1' of git://git.kernel.org/pub/scm/linux/kernel/git/jhogan/kvm-mips into HEAD</title>
<updated>2017-02-07T17:18:13Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2017-02-07T17:18:13Z</published>
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<id>urn:sha1:d9c0e59f92d491a7be5172eaf2d600b4953a0bd4</id>
<content type='text'>
KVM: MIPS: GVA/GPA page tables, dirty logging, SYNC_MMU etc

Numerous MIPS KVM fixes, improvements, and features for 4.11, many of
which continue to pave the way for VZ support, the most interesting of
which are:

 - Add GVA-&gt;HPA page tables for T&amp;E, to cache GVA mappings.
 - Generate fast-path TLB refill exception handler which loads host TLB
   entries from GVA page table, avoiding repeated guest memory
   translation and guest TLB lookups.
 - Use uaccess macros when T&amp;E needs to access guest memory, which with
   GVA page tables and the Linux TLB refill handler improves robustness
   against TLB faults and fixes EVA hosts.
 - Use BadInstr/BadInstrP registers when available to obtain instruction
   encodings after a synchronous trap.
 - Add GPA-&gt;HPA page tables to replace the inflexible linear array,
   allowing for multiple sparsely arranged memory regions.
 - Properly implement dirty page logging.
 - Add KVM_CAP_SYNC_MMU support so that changes in GPA mappings become
   effective in guests even if they are already running, allowing for
   copy-on-write, KSM, idle page tracking, swapping, and guest memory
   ballooning.
 - Add KVM_CAP_READONLY_MEM support, so writes to specified memory
   regions are treated as MMIO.
 - Implement proper CP0_EBase support in T&amp;E.
 - Expose a few more missing CP0 registers to userland.
 - Add KVM_CAP_NR_VCPUS and KVM_CAP_MAX_VCPUS support, and allow up to 8
   VCPUs to be created in a VM.
 - Various cleanups and dropping of dead and duplicated code.
</content>
</entry>
<entry>
<title>Merge branch 'kvm-ppc-next' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc into HEAD</title>
<updated>2017-02-07T17:17:46Z</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2017-02-07T17:17:02Z</published>
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<id>urn:sha1:d5b798c15fb97136dc13ac5a9629f91e88d5d565</id>
<content type='text'>
The big feature this time is support for POWER9 using the radix-tree
MMU for host and guest.  This required some changes to arch/powerpc
code, so I talked with Michael Ellerman and he created a topic branch
with this patchset, which I merged into kvm-ppc-next and which Michael
will pull into his tree.  Michael also put in some patches from Nick
Piggin which fix bugs in the interrupt vector code in relocatable
kernels when coming from a KVM guest.

Other notable changes include:

* Add the ability to change the size of the hashed page table,
  from David Gibson.

* XICS (interrupt controller) emulation fixes and improvements,
  from Li Zhong.

* Bug fixes from myself and Thomas Huth.

These patches define some new KVM capabilities and ioctls, but there
should be no conflicts with anything else currently upstream, as far
as I am aware.
</content>
</entry>
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