<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/arc/include/asm/processor.h, branch v3.9</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v3.9</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v3.9'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2013-02-15T17:46:02Z</updated>
<entry>
<title>ARC: SMP support</title>
<updated>2013-02-15T17:46:02Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=41195d236e84458bebd4fdc218610a92231ac791'/>
<id>urn:sha1:41195d236e84458bebd4fdc218610a92231ac791</id>
<content type='text'>
ARC common code to enable a SMP system + ISS provided SMP extensions.

ARC700 natively lacks SMP support, hence some of the core features are
are only enabled if SoCs have the necessary h/w pixie-dust. This
includes:
-Inter Processor Interrupts (IPI)
-Cache coherency
-load-locked/store-conditional
...

The low level exception handling would be completely broken in SMP
because we don't have hardware assisted stack switching. Thus a fair bit
of this code is repurposing the MMU_SCRATCH reg for event handler
prologues to keep them re-entrant.

Many thanks to Rajeshwar Ranga for his initial "major" contributions to
SMP Port (back in 2008), and to Noam Camus and Gilad Ben-Yossef for help
with resurrecting that in 3.2 kernel (2012).

Note that this platform code is again singleton design pattern - so
multiple SMP platforms won't build at the moment - this deficiency is
addressed in subsequent patches within this series.

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Rajeshwar Ranga &lt;rajeshwar.ranga@gmail.com&gt;
Cc: Noam Camus &lt;noamc@ezchip.com&gt;
Cc: Gilad Ben-Yossef &lt;gilad@benyossef.com&gt;
</content>
</entry>
<entry>
<title>ARC: [optim] Cache "current" in Register r25</title>
<updated>2013-02-15T17:45:58Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-02-11T14:22:57Z</published>
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<id>urn:sha1:080c37473eb671a037b3e9a315303851f0675be5</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
</content>
</entry>
<entry>
<title>ARC: Process-creation/scheduling/idle-loop</title>
<updated>2013-02-11T14:30:38Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:18Z</published>
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<id>urn:sha1:bf90e1eab682dcb79b7765989fb65835ce9d6165</id>
<content type='text'>
Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Al Viro &lt;viro@ZenIV.linux.org.uk&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>ARC: Fundamental ARCH data-types/defines</title>
<updated>2013-02-11T14:30:34Z</updated>
<author>
<name>Vineet Gupta</name>
<email>vgupta@synopsys.com</email>
</author>
<published>2013-01-18T09:42:17Z</published>
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<id>urn:sha1:3be80aaef861a60b85a9323462ebb5f623774f7a</id>
<content type='text'>
* L1_CACHE_SHIFT
* PAGE_SIZE, PAGE_OFFSET
* struct pt_regs, struct user_regs_struct
* struct thread_struct, cpu_relax(), task_pt_regs(), start_thread(), ...
* struct thread_info, THREAD_SIZE, INIT_THREAD_INFO(), TIF_*, ...
* BUG()
* ELF_*
* Elf_*

To disallow user-space visibility into some of the core kernel data-types
such as struct pt_regs, #ifdef __KERNEL__ which also makes the UAPI header
spit (further patch in the series) to NOT export it to asm/uapi/ptrace.h

Signed-off-by: Vineet Gupta &lt;vgupta@synopsys.com&gt;
Cc: Jonas Bonn &lt;jonas.bonn@gmail.com&gt;
Cc: Al Viro &lt;viro@ZenIV.linux.org.uk&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
