linux/arch/arc/kernel/entry.S, branch v3.18

ARC: Fixed spelling errors within comments

2014-05-05T08:52:12Z

[vgupta: fixed changelong + added Randy's suggestion] Signed-off-by: Terence Eden Acked-by: Randy Dunlap Signed-off-by: Vineet Gupta

ARC: !PREEMPT: Ensure Return to kernel mode is IRQ safe

2014-04-30T15:21:43Z

There was a very small race window where resume to kernel mode from a Exception Path (or pure kernel mode which is true for most of ARC exceptions anyways), was not disabling interrupts in restore_regs, clobbering the exception regs Anton found the culprit call flow (after many sleepless nights) | 1. we got a Trap from user land | 2. started to service it. | 3. While doing some stuff on user-land memory (I think it is padzero()), | we got a DataTlbMiss | 4. On return from it we are taking "resume_kernel_mode" path | 5. NEED_RESHED is not set, so we go to "return from exception" path in | restore regs. | 6. there seems to be IRQ happening Signed-off-by: Vineet Gupta Cc: #3.10, 3.12, 3.13, 3.14 Cc: Anton Kolesov Cc: Francois Bedard Signed-off-by: Linus Torvalds

ARC: switch to generic ENTRY/END assembler annotations

2014-03-26T09:01:28Z

With commit 9df62f054406 "arch: use ASM_NL instead of ';'" the generic macros can handle the arch specific newline quirk. Hence we can get rid of ARC asm macros and use the "C" style macros. Signed-off-by: Vineet Gupta

ARC: Add support for irqflags tracing and lockdep

2013-11-06T05:11:40Z

Lockdep required a small fix to stacktrace API which was incorrectly unwindign out of __switch_to for the current call frame. Signed-off-by: Vineet Gupta

ARC: Reduce #ifdef'ery for unaligned access emulation

2013-11-06T05:11:39Z

Emulation not enabled is treated as if the fixup failed, so no need for special #ifdef checks. Signed-off-by: Vineet Gupta

ARC: Change calling convention of do_page_fault()

2013-11-06T05:11:39Z

switch the args (address, pt_regs) to match with all the other "C" exception handlers. This removes the awkwardness in EV_ProtV for page fault vs. unaligned access. Signed-off-by: Vineet Gupta

ARC: Entry Handler tweaks: Optimize away redundant IRQ_DISABLE_SAVE

2013-08-26T04:10:25Z

In the exception return path, for both U/K cases, intr are already disabled (for various existing reasons). So when we drop down to @restore_regs, we need not redo that. There was subtle issue - when intr were NOT being disabled for ret-to-kernel-but-no-preemption case - now fixed by moving the IRQ_DISABLE further up in @resume_kernel_mode. So what do we gain: * Shaves off a few insn in return path. * Eliminates the need for IRQ_DISABLE_SAVE assembler macro for ARCv2 hence allows for entry code sharing. Signed-off-by: Vineet Gupta

ARC: Exception Handlers Code consolidation

2013-08-26T04:10:25Z

After the recent cleanups, all the exception handlers now have same boilerplate prologue code. Move that into common macro. This reduces readability but helps greatly with sharing / duplicating entry code with ARCv2 ISA where the handlers are pretty much the same, just the entry prologue is different (due to hardware assist). Also while at it, add the missing FAKE_RET_FROM_EXCPN calls in couple of places to drop down to pure kernel mode (from exception mode) before jumping off into "C" code. Signed-off-by: Vineet Gupta

ARC: Remove explicit passing around of ECR

2013-06-26T10:00:50Z

With ECR now part of pt_regs * No need to propagate from lowest asm handlers as arg * No need to save it in tsk->thread.cause_code * Avoid bit chopping to access the bit-fields More code consolidation, cleanup Signed-off-by: Vineet Gupta

ARC: pt_regs update #5: Use real ECR for pt_regs->event vs. synth values

2013-06-26T08:34:48Z

pt_regs->event was set with artificial values to identify the low level system event (syscall trap / breakpoint trap / exceptions / interrupts) With r8 saving out of the way, the full word can be used to save real ECR (Exception Cause Register) which helps idenify the event naturally, including additional info such as cause code, param. Only for Interrupts, where ECR is not applicable, do we resort to synthetic non ECR values. SAVE_ALL_TRAP/EXCEPTIONS can now be merged as they both use ECR with different runtime values. The ptrace helpers now use the sub-fields of ECR to distinguish the events (e.g. vector 0x25 is trap, param 0 is syscall...) The following benefits will follow: (1) This centralizes the location of where ECR is saved and will allow the cleanup of task->thread.cause_code ECR placeholder which is set in non-uniform way. Then ARC VM code can safely rely on it being there for purpose of finer grained VM_EXEC dcache flush (based on exec fault: I-TLB Miss) (2) Further, ECR being passed around from low level handlers as arg can be eliminated as it is part of standard reg-file in pt_regs Signed-off-by: Vineet Gupta