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<title>linux/arch/arm/kernel/devtree.c, branch v4.9</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.9</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.9'/>
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<updated>2016-09-29T15:57:43Z</updated>
<entry>
<title>ARM: 8616/1: dt: Respect property size when parsing CPUs</title>
<updated>2016-09-29T15:57:43Z</updated>
<author>
<name>Robin Murphy</name>
<email>robin.murphy@arm.com</email>
</author>
<published>2016-09-26T15:50:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ba6dea4f7cedb4b1c17e36f4087675d817c2e24b'/>
<id>urn:sha1:ba6dea4f7cedb4b1c17e36f4087675d817c2e24b</id>
<content type='text'>
Whilst MPIDR values themselves are less than 32 bits, it is still
perfectly valid for a DT to have #address-cells &gt; 1 in the CPUs node,
resulting in the "reg" property having leading zero cell(s). In that
situation, the big-endian nature of the data conspires with the current
behaviour of only reading the first cell to cause the kernel to think
all CPUs have ID 0, and become resoundingly unhappy as a consequence.

Take the full property length into account when parsing CPUs so as to
be correct under any circumstances.

Cc: Russell King &lt;linux@armlinux.org.uk&gt;
Signed-off-by: Robin Murphy &lt;robin.murphy@arm.com&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8581/1: add missing &lt;asm/prom.h&gt; to arch/arm/kernel/devtree.c</title>
<updated>2016-06-22T18:55:12Z</updated>
<author>
<name>Ben Dooks</name>
<email>ben-linux@fluff.org</email>
</author>
<published>2016-06-17T17:21:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2374b063c3dfbb68a40b52067eaff81510f384b1'/>
<id>urn:sha1:2374b063c3dfbb68a40b52067eaff81510f384b1</id>
<content type='text'>
Fix the following warnings by including declarations
from &lt;asm/prom.h&gt;:

arch/arm/kernel/devtree.c:69:13: warning: symbol 'arm_dt_init_cpu_maps' was not declared. Should it be static?
arch/arm/kernel/devtree.c:210:27: warning: symbol 'setup_machine_fdt' was not declared. Should it be static?

Signed-off-by: Ben Dooks &lt;ben.dooks@codethink.co.uk&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: 8556/1: on a generic DT system: do not touch l2x0</title>
<updated>2016-06-22T18:55:12Z</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2016-04-04T08:22:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cb6f8344f8780d75929c6a20f1f094d2585003f4'/>
<id>urn:sha1:cb6f8344f8780d75929c6a20f1f094d2585003f4</id>
<content type='text'>
Set no bits, mask all bits in the AUX l2x0 register for the
default DT ARM system: if anything needs to be modified, it
should be done using DT bindings.

Suggested-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: make default platform work for NOMMU</title>
<updated>2015-12-17T16:45:47Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2015-12-17T16:45:47Z</published>
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<id>urn:sha1:70722803de91a7670979dcb5748631b4e3c1b219</id>
<content type='text'>
Moving ARCH_VERSATILE into ARCH_MULTIPLATFORM means that it no longer
works as the default target for MMU-less kernels. While we might
want to get that working again in the future, it's also a rather
bad default, and it makes sense to make ARM_SINGLE_V7M the default
because that is what realistically all NOMMU users on ARM are using,
and it actually is what gets selected by default in the absence of
versatile in the choice statement.

Related to this, 'allnoconfig' kernels fail to link with the new
default, as they do not include a machine record:

arm-linux-gnueabi-ld: no machine record defined

For ARCH_MULTIPLATFORM kernels, we avoid this error by using a
default machine descriptor that works for all trivial platforms,
like ARCH_VIRT. The same reasoning applies for ARM_SINGLE_V7M,
as that can also boot with empty machine descriptors both on
qemu and on real hardware, as long as all the drivers are present.

We could also follow up with a patch to remove the existing
machine descriptors for the ARMv7M platforms, the only callback
pointer the four platforms contain today is the armv7m_restart
handler and we can simply make that the default for v7M with an
add-on patch.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>arm: add missing of_node_put</title>
<updated>2015-10-26T10:58:26Z</updated>
<author>
<name>Julia Lawall</name>
<email>julia.lawall@lip6.fr</email>
</author>
<published>2015-10-10T21:41:42Z</published>
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<id>urn:sha1:a4283e41bbd80c629770f954cc5d013eb8851229</id>
<content type='text'>
for_each_child_of_node performs an of_node_get on each iteration, so
a break out of the loop requires an of_node_put.

The of_node_put is duplicated in front of each error return, because the
function contains a later error return that is beyond the end of the
for_each_child_of_node and thus doesn't need of_node_put.

The semantic patch that fixes this problem is as follows
(http://coccinelle.lip6.fr):

// &lt;smpl&gt;
@@
expression root,e;
local idexpression child;
iterator name for_each_child_of_node;
@@

 for_each_child_of_node(root, child) {
   ... when != of_node_put(child)
       when != e = child
(
   return child;
|
+  of_node_put(child);
?  return ...;
)
   ...
 }

@@
expression root,e;
local idexpression child;
@@

 for_each_child_of_node(root, child) {
   ... when != of_node_put(child)
       when != e = child
+  of_node_put(child);
?  break;
   ...
}
... when != child
// &lt;/smpl&gt;

Additionally, concatenated a string in an affected line to avoid introducing
a checkpatch warning.

Signed-off-by: Julia Lawall &lt;Julia.Lawall@lip6.fr&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>arm: Add devicetree fixup machine function</title>
<updated>2014-07-30T03:26:49Z</updated>
<author>
<name>Laura Abbott</name>
<email>lauraa@codeaurora.org</email>
</author>
<published>2014-07-15T17:03:36Z</published>
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<id>urn:sha1:5a12a597a8627b91fd9d94365853f9f69a4f399c</id>
<content type='text'>
Commit 1c2f87c22566cd057bc8cde10c37ae9da1a1bb76
(ARM: 8025/1: Get rid of meminfo) dropped the upper bound on
the number of memory banks that can be added as there was no
technical need in the kernel. It turns out though, some bootloaders
(specifically the arndale-octa exynos boards) may pass invalid memory
information and rely on the kernel to not parse this data. This is a
bug in the bootloader but we still need to work around this.
Work around this by introducing a dt_fixup function. This function
gets called before the flattened devicetree is scanned for memory
and the like. In this fixup function for exynos, limit the maximum
number of memory regions in the devicetree.

Signed-off-by: Laura Abbott &lt;lauraa@codeaurora.org&gt;
Tested-by: Andreas Färber &lt;afaerber@suse.de&gt;
[glikely: Added a comment and fixed up function name]
Signed-off-by: Grant Likely &lt;grant.likely@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm into next</title>
<updated>2014-06-05T22:57:04Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2014-06-05T22:57:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=eb3d3ec567e868c8a3bfbfdfc9465ffd52983d11'/>
<id>urn:sha1:eb3d3ec567e868c8a3bfbfdfc9465ffd52983d11</id>
<content type='text'>
Pull ARM updates from Russell King:

 - Major clean-up of the L2 cache support code.  The existing mess was
   becoming rather unmaintainable through all the additions that others
   have done over time.  This turns it into a much nicer structure, and
   implements a few performance improvements as well.

 - Clean up some of the CP15 control register tweaks for alignment
   support, moving some code and data into alignment.c

 - DMA properties for ARM, from Santosh and reviewed by DT people.  This
   adds DT properties to specify bus translations we can't discover
   automatically, and to indicate whether devices are coherent.

 - Hibernation support for ARM

 - Make ftrace work with read-only text in modules

 - add suspend support for PJ4B CPUs

 - rework interrupt masking for undefined instruction handling, which
   allows us to enable interrupts earlier in the handling of these
   exceptions.

 - support for big endian page tables

 - fix stacktrace support to exclude stacktrace functions from the
   trace, and add save_stack_trace_regs() implementation so that kprobes
   can record stack traces.

 - Add support for the Cortex-A17 CPU.

 - Remove last vestiges of ARM710 support.

 - Removal of ARM "meminfo" structure, finally converting us solely to
   memblock to handle the early memory initialisation.

* 'for-linus' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: (142 commits)
  ARM: ensure C page table setup code follows assembly code (part II)
  ARM: ensure C page table setup code follows assembly code
  ARM: consolidate last remaining open-coded alignment trap enable
  ARM: remove global cr_no_alignment
  ARM: remove CPU_CP15 conditional from alignment.c
  ARM: remove unused adjust_cr() function
  ARM: move "noalign" command line option to alignment.c
  ARM: provide common method to clear bits in CPU control register
  ARM: 8025/1: Get rid of meminfo
  ARM: 8060/1: mm: allow sub-architectures to override PCI I/O memory type
  ARM: 8066/1: correction for ARM patch 8031/2
  ARM: 8049/1: ftrace/add save_stack_trace_regs() implementation
  ARM: 8065/1: remove last use of CONFIG_CPU_ARM710
  ARM: 8062/1: Modify ldrt fixup handler to re-execute the userspace instruction
  ARM: 8047/1: rwsem: use asm-generic rwsem implementation
  ARM: l2c: trial at enabling some Cortex-A9 optimisations
  ARM: l2c: add warnings for stuff modifying aux_ctrl register values
  ARM: l2c: print a warning with L2C-310 caches if the cache size is modified
  ARM: l2c: remove old .set_debug method
  ARM: l2c: kill L2X0_AUX_CTRL_MASK before anyone else makes use of this
  ...
</content>
</entry>
<entry>
<title>ARM: 8025/1: Get rid of meminfo</title>
<updated>2014-06-01T00:17:12Z</updated>
<author>
<name>Laura Abbott</name>
<email>lauraa@codeaurora.org</email>
</author>
<published>2014-04-13T21:54:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1c2f87c22566cd057bc8cde10c37ae9da1a1bb76'/>
<id>urn:sha1:1c2f87c22566cd057bc8cde10c37ae9da1a1bb76</id>
<content type='text'>
memblock is now fully integrated into the kernel and is the prefered
method for tracking memory. Rather than reinvent the wheel with
meminfo, migrate to using memblock directly instead of meminfo as
an intermediate.

Acked-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Acked-by: Santosh Shilimkar &lt;santosh.shilimkar@ti.com&gt;
Acked-by: Kukjin Kim &lt;kgene.kim@samsung.com&gt;
Tested-by: Marek Szyprowski &lt;m.szyprowski@samsung.com&gt;
Tested-by: Leif Lindholm &lt;leif.lindholm@linaro.org&gt;
Signed-off-by: Laura Abbott &lt;lauraa@codeaurora.org&gt;
Signed-off-by: Russell King &lt;rmk+kernel@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>ARM: align cpu_method_of_table naming</title>
<updated>2014-05-20T19:24:41Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-03-24T21:11:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9a721c41113a50ccbe184d67a5e551feb99e36a9'/>
<id>urn:sha1:9a721c41113a50ccbe184d67a5e551feb99e36a9</id>
<content type='text'>
The cpu_method_of_table is the oddball of the various OF linker sections.
In preparation to have common linker section definitions, align the
cpu_method_of_table with the other definitions for the naming and ending
with a blank struct.

Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>of/fdt: move memreserve and dtb memory reservations into core</title>
<updated>2014-04-30T05:59:17Z</updated>
<author>
<name>Rob Herring</name>
<email>robh@kernel.org</email>
</author>
<published>2014-04-02T03:46:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d1552ce449eb0a8d2f0bd6599da3a8a3d7f77a84'/>
<id>urn:sha1:d1552ce449eb0a8d2f0bd6599da3a8a3d7f77a84</id>
<content type='text'>
Move the /memreserve/ processing and dtb memory reservations into
early_init_fdt_scan_reserved_mem. This converts arm, arm64, and powerpc
as they are the only users of early_init_fdt_scan_reserved_mem.

memblock_reserve is safe to call on the same region twice, so the
reservation check for the dtb in powerpc 32-bit reservations is safe to
remove.

Signed-off-by: Rob Herring &lt;robh@kernel.org&gt;
Tested-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Cc: Will Deacon &lt;will.deacon@arm.com&gt;
Cc: Benjamin Herrenschmidt &lt;benh@kernel.crashing.org&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Tested-by: Grant Likely &lt;grant.likely@linaro.org&gt;
Tested-by: Stephen Chivers &lt;schivers@csc.com&gt;
</content>
</entry>
</feed>
