<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/loongarch/include/uapi, branch master</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=master</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=master'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2026-04-09T10:56:37Z</updated>
<entry>
<title>LoongArch: KVM: Add DMSINTC device support</title>
<updated>2026-04-09T10:56:37Z</updated>
<author>
<name>Song Gao</name>
<email>gaosong@loongson.cn</email>
</author>
<published>2026-04-09T10:56:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=229132c309d667bb05405fc8b539e7d90e0dfb3b'/>
<id>urn:sha1:229132c309d667bb05405fc8b539e7d90e0dfb3b</id>
<content type='text'>
Add device model for DMSINTC interrupt controller, implement basic
create/destroy/set_attr interfaces, and register device model to kvm
device table.

Reviewed-by: Bibo Mao &lt;maobibo@loongson.cn&gt;
Signed-off-by: Song Gao &lt;gaosong@loongson.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
<entry>
<title>Merge tag 'loongarch-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson</title>
<updated>2026-02-14T20:47:15Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2026-02-14T20:47:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=64275e9fda3702bfb5ab3b95f7c2b9b414667164'/>
<id>urn:sha1:64275e9fda3702bfb5ab3b95f7c2b9b414667164</id>
<content type='text'>
Pull LoongArch updates from Huacai Chen:
 - Select HAVE_CMPXCHG_{LOCAL,DOUBLE}
 - Add 128-bit atomic cmpxchg support
 - Add HOTPLUG_SMT implementation
 - Wire up memfd_secret system call
 - Fix boot errors and unwind errors for KASAN
 - Use BPF prog pack allocator and add BPF arena support
 - Update dts files to add nand controllers
 - Some bug fixes and other small changes

* tag 'loongarch-7.0' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson:
  LoongArch: dts: loongson-2k1000: Add nand controller support
  LoongArch: dts: loongson-2k0500: Add nand controller support
  LoongArch: BPF: Implement bpf_addr_space_cast instruction
  LoongArch: BPF: Implement PROBE_MEM32 pseudo instructions
  LoongArch: BPF: Use BPF prog pack allocator
  LoongArch: Use IS_ERR_PCPU() macro for KGDB
  LoongArch: Rework KASAN initialization for PTW-enabled systems
  LoongArch: Disable instrumentation for setup_ptwalker()
  LoongArch: Remove some extern variables in source files
  LoongArch: Guard percpu handler under !CONFIG_PREEMPT_RT
  LoongArch: Handle percpu handler address for ORC unwinder
  LoongArch: Use %px to print unmodified unwinding address
  LoongArch: Prefer top-down allocation after arch_mem_init()
  LoongArch: Add HOTPLUG_SMT implementation
  LoongArch: Make cpumask_of_node() robust against NUMA_NO_NODE
  LoongArch: Wire up memfd_secret system call
  LoongArch: Replace seq_printf() with seq_puts() for simple strings
  LoongArch: Add 128-bit atomic cmpxchg support
  LoongArch: Add detection for SC.Q support
  LoongArch: Select HAVE_CMPXCHG_LOCAL in Kconfig
</content>
</entry>
<entry>
<title>LoongArch: Add detection for SC.Q support</title>
<updated>2026-02-10T11:31:06Z</updated>
<author>
<name>George Guo</name>
<email>dongtai.guo@linux.dev</email>
</author>
<published>2026-02-10T11:31:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=48543c4283e76d561d11b9955222b1a3054abdb9'/>
<id>urn:sha1:48543c4283e76d561d11b9955222b1a3054abdb9</id>
<content type='text'>
Check the CPUCFG2_SCQ bit to determine if the current CPU supports the
SC.Q instruction.

Reviewed-by: Hengqi Chen &lt;hengqi.chen@gmail.com&gt;
Tested-by: Hengqi Chen &lt;hengqi.chen@gmail.com&gt;
Co-developed-by: Yangyang Lian &lt;lianyangyang@kylinos.cn&gt;
Signed-off-by: Yangyang Lian &lt;lianyangyang@kylinos.cn&gt;
Signed-off-by: George Guo &lt;guodongtai@kylinos.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
<entry>
<title>LoongArch: KVM: Add paravirt preempt feature in hypervisor side</title>
<updated>2026-02-06T01:28:01Z</updated>
<author>
<name>Bibo Mao</name>
<email>maobibo@loongson.cn</email>
</author>
<published>2026-02-06T01:28:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9b486cdd032a90032c6b567ea723595205ca2626'/>
<id>urn:sha1:9b486cdd032a90032c6b567ea723595205ca2626</id>
<content type='text'>
Feature KVM_FEATURE_PREEMPT is added to show whether vCPU is preempted
or not. It is to help guest OS scheduling or lock checking etc. Here
add KVM_FEATURE_PREEMPT feature and use one byte as preempted flag in
the steal time structure.

Signed-off-by: Bibo Mao &lt;maobibo@loongson.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
<entry>
<title>Merge tag 'loongarch-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson</title>
<updated>2025-12-12T17:44:03Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2025-12-12T17:44:03Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9551a26f17d9445eed497bd7c639d48dfc3c0af4'/>
<id>urn:sha1:9551a26f17d9445eed497bd7c639d48dfc3c0af4</id>
<content type='text'>
Pull LoongArch updates from Huacai Chen:

 - Add basic LoongArch32 support

   Note: Build infrastructures of LoongArch32 are not enabled yet,
   because we need to adjust irqchip drivers and wait for GNU toolchain
   be upstream first.

 - Select HAVE_ARCH_BITREVERSE in Kconfig

 - Fix build and boot for CONFIG_RANDSTRUCT

 - Correct the calculation logic of thread_count

 - Some bug fixes and other small changes

* tag 'loongarch-6.19' of git://git.kernel.org/pub/scm/linux/kernel/git/chenhuacai/linux-loongson: (22 commits)
  LoongArch: Adjust default config files for 32BIT/64BIT
  LoongArch: Adjust VDSO/VSYSCALL for 32BIT/64BIT
  LoongArch: Adjust misc routines for 32BIT/64BIT
  LoongArch: Adjust user accessors for 32BIT/64BIT
  LoongArch: Adjust system call for 32BIT/64BIT
  LoongArch: Adjust module loader for 32BIT/64BIT
  LoongArch: Adjust time routines for 32BIT/64BIT
  LoongArch: Adjust process management for 32BIT/64BIT
  LoongArch: Adjust memory management for 32BIT/64BIT
  LoongArch: Adjust boot &amp; setup for 32BIT/64BIT
  LoongArch: Adjust common macro definitions for 32BIT/64BIT
  LoongArch: Add adaptive CSR accessors for 32BIT/64BIT
  LoongArch: Add atomic operations for 32BIT/64BIT
  LoongArch: Add new PCI ID for pci_fixup_vgadev()
  LoongArch: Add and use some macros for AVEC
  LoongArch: Correct the calculation logic of thread_count
  LoongArch: Use unsigned long for _end and _text
  LoongArch: Use __pmd()/__pte() for swap entry conversions
  LoongArch: Fix arch_dup_task_struct() for CONFIG_RANDSTRUCT
  LoongArch: Fix build errors for CONFIG_RANDSTRUCT
  ...
</content>
</entry>
<entry>
<title>LoongArch: Adjust system call for 32BIT/64BIT</title>
<updated>2025-12-08T10:09:17Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhuacai@loongson.cn</email>
</author>
<published>2025-12-08T10:09:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=14338e631afd6d4b2c2f8fb7deba786d86c40fad'/>
<id>urn:sha1:14338e631afd6d4b2c2f8fb7deba786d86c40fad</id>
<content type='text'>
Adjust system call for both 32BIT and 64BIT, including: add the uapi
unistd_{32,64}.h and syscall_table_{32,64}.h inclusion, add sys_mmap2()
definition, change the system call entry routines, etc.

Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
<entry>
<title>LoongArch: Adjust process management for 32BIT/64BIT</title>
<updated>2025-12-08T10:09:17Z</updated>
<author>
<name>Huacai Chen</name>
<email>chenhuacai@loongson.cn</email>
</author>
<published>2025-12-08T10:09:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4ad04e7c7eed8583bd49509f4aad4d28bc4b399d'/>
<id>urn:sha1:4ad04e7c7eed8583bd49509f4aad4d28bc4b399d</id>
<content type='text'>
Adjust process management for both 32BIT and 64BIT, including: CPU
context switching, FPU loading/restoring, process dumping and process
tracing routines.

Q: Why modify switch.S?
A: LoongArch32 has no ldptr.d/stptr.d instructions, and asm offsets of
   thead_struct members are too large to be filled in the 12b immediate
   field of ld.w/st.w.

Reviewed-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Jiaxun Yang &lt;jiaxun.yang@flygoat.com&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
<entry>
<title>LoongArch: KVM: Add AVEC basic support</title>
<updated>2025-11-27T03:00:18Z</updated>
<author>
<name>Song Gao</name>
<email>gaosong@loongson.cn</email>
</author>
<published>2025-11-27T03:00:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7bcd8d0b2237fd0f698bcd0c90badf7c46270d9b'/>
<id>urn:sha1:7bcd8d0b2237fd0f698bcd0c90badf7c46270d9b</id>
<content type='text'>
Check whether the host CPU supported AVEC, and save/restore CSR_MSGIS0-
CSR_MSGIS3 when necessary.

Reviewed-by: Bibo Mao &lt;maobibo@loongson.cn&gt;
Signed-off-by: Song Gao &lt;gaosong@loongson.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
<entry>
<title>LoongArch: Use UAPI types in ptrace UAPI header</title>
<updated>2025-11-20T06:42:05Z</updated>
<author>
<name>Thomas Weißschuh</name>
<email>linux@weissschuh.net</email>
</author>
<published>2025-11-20T06:42:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=20d7338f2d3bcb570068dd6d39b16f1a909fe976'/>
<id>urn:sha1:20d7338f2d3bcb570068dd6d39b16f1a909fe976</id>
<content type='text'>
The kernel UAPI headers already contain fixed-width integer types, there
is no need to rely on the libc types. There may not be a libc available
or the libc may not provides the &lt;stdint.h&gt;, like for example on nolibc.

This also aligns the header with the rest of the LoongArch UAPI headers.

Fixes: 803b0fc5c3f2 ("LoongArch: Add process management")
Signed-off-by: Thomas Weißschuh &lt;linux@weissschuh.net&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
<entry>
<title>LoongArch: KVM: Add PTW feature detection on new hardware</title>
<updated>2025-09-23T15:37:08Z</updated>
<author>
<name>Bibo Mao</name>
<email>maobibo@loongson.cn</email>
</author>
<published>2025-09-23T15:37:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7109f51bcc80b79a8f31e50fa5c96a20c54197d9'/>
<id>urn:sha1:7109f51bcc80b79a8f31e50fa5c96a20c54197d9</id>
<content type='text'>
With new Loongson-3A6000/3C6000 hardware platforms (or later), hardware
page table walking (PTW) feature is supported on host. So here add this
feature detection on KVM host.

Signed-off-by: Bibo Mao &lt;maobibo@loongson.cn&gt;
Signed-off-by: Huacai Chen &lt;chenhuacai@loongson.cn&gt;
</content>
</entry>
</feed>
