<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/mips/include/asm/module.h, branch v3.0</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v3.0</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v3.0'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2011-05-19T08:55:40Z</updated>
<entry>
<title>MIPS: Netlogic: Cache, TLB support and feature overrides for XLR</title>
<updated>2011-05-19T08:55:40Z</updated>
<author>
<name>Jayachandran C</name>
<email>jayachandranc@netlogicmicro.com</email>
</author>
<published>2011-05-06T20:06:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=efa0f81c11021c95b1e72c65868115b6fb4ecc6a'/>
<id>urn:sha1:efa0f81c11021c95b1e72c65868115b6fb4ecc6a</id>
<content type='text'>
CPU_XLR case added to mm/tlbex.c
CPU_XLR case added to mm/c-r4k.c for PINDEX attribute
Feature overrides for XLR cpu.

Signed-off-by: Jayachandran C &lt;jayachandranc@netlogicmicro.com&gt;
To: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/2333/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add Cavium OCTEON processor constants and CPU probe.</title>
<updated>2009-01-11T09:57:22Z</updated>
<author>
<name>David Daney</name>
<email>ddaney@caviumnetworks.com</email>
</author>
<published>2008-12-11T23:33:26Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0dd4781bca56871434507ed35d5bb8ef92077907'/>
<id>urn:sha1:0dd4781bca56871434507ed35d5bb8ef92077907</id>
<content type='text'>
Add OCTEON constants to asm/cpu.h and asm/module.h.

Add probe function for Cavium OCTEON CPUs and hook it up.

Signed-off-by: Tomaso Paoletti &lt;tpaoletti@caviumnetworks.com&gt;
Signed-off-by: David Daney &lt;ddaney@caviumnetworks.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors</title>
<updated>2008-10-27T16:18:29Z</updated>
<author>
<name>Shinya Kuribayashi</name>
<email>skuribay@ruby.dti.ne.jp</email>
</author>
<published>2008-10-23T16:27:57Z</published>
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<id>urn:sha1:542c1020ac1cbc2f50934086ad893384a2cbd233</id>
<content type='text'>
We already have sufficient infrastructure to support VR5500 and VR5500A
series processors.  Here's a Makefile support to make it selectable by
ports, and enable it for NEC EMMA2RH Markeins board.

This patch also fixes a confused target help, and adds 1Gb PageMask bits
supported by VR5500 and its variants.

Signed-off-by: Shinya Kuribayashi &lt;shinya.kuribayashi@necel.com&gt;
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>MIPS: Move headfiles to new location below arch/mips/include</title>
<updated>2008-10-11T15:18:52Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2008-09-16T17:48:51Z</published>
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<id>urn:sha1:384740dc49ea651ba350704d13ff6be9976e37fe</id>
<content type='text'>
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
