linux/arch/tile/kernel/intvec_64.S, branch v4.5

arch/tile: move user_exit() to early kernel entry sequence

2016-01-18T19:49:30Z

This ensures that we always notify context tracking that we have exited from user space no matter how we enter the kernel. It is similar to how arm64 handles context tracking, for example. This allows the removal of all the exception_enter() calls that were added in commit 49e4e15619cd ("tile: support CONTEXT_TRACKING and thus NOHZ_FULL"). Signed-off-by: Chris Metcalf

tile: fix bug in setting PT_FLAGS_DISABLE_IRQ on kernel entry

2016-01-18T19:49:26Z

This flag value is saved in ptregs and used to decide whether to disable irqs when returning from the kernel. Commit 1168df528fe4 ("tile: don't assume user privilege is zero") performed a bad merge from some KVM-enabled code that had not yet been upstreamed. The only issue with the old code is that we will read the interrupt mask in more conditions than we need to (e.g., coming from user space when user space has the Interrupt Critical Section bit set, or coming from a guest kernel), which is a slow multi-cycle operation. This change saves those few cycles in the common case. Signed-off-by: Chris Metcalf

arch/tile: adopt prepare_exit_to_usermode() model from x86

2016-01-18T19:49:09Z

This change is a prerequisite change for TASK_ISOLATION but also stands on its own for readability and maintainability. The existing tile do_work_pending() was called in a loop from assembly on the slow path; this change moves the loop into C code as well. For the x86 version see commit c5c46f59e4e7 ("x86/entry: Add new, comprehensible entry and exit handlers written in C"). This change exposes a pre-existing bug on the older tilepro platform; the singlestep processing is done last, but on tilepro (unlike tilegx) we enable interrupts while doing that processing, so we could in theory miss a signal or other asynchronous event. A future change could fix this by breaking the singlestep work into a "prepare" step done in the main loop, and a "trigger" step done after exiting the loop. Since this change is intended as purely a restructuring change, we call out the bug explicitly now, but don't yet fix it. Signed-off-by: Chris Metcalf

tile: enable full SECCOMP support

2015-07-30T16:32:16Z

Signed-off-by: Chris Metcalf

tile: support delivering NMIs for multicore backtrace

2015-05-11T15:22:31Z

A new hypervisor service was added some time ago (MDE 4.2.1 or later, or MDE 4.3 or later) that allows cores to request NMIs to be delivered to other cores. Use this facility to deliver a request that causes a backtrace to be generated on each core, and hook it into the magic SysRq functionality. Signed-off-by: Chris Metcalf

tile: Enable NMIs on return from handle_nmi() without errors

2014-03-07T16:19:48Z

NMI interrupts mask ALL interrupts before calling the handler, so we need to unmask NMIs according to the value handle_nmi() returns. If it returns zero, the NMIs should be re-enabled; if it returns a non-zero error, the NMIs should be disabled. Signed-off-by: Zhigang Lu Signed-off-by: Chris Metcalf

tile: Add support for handling PMC hardware

2014-03-07T16:19:47Z

The PMC module is used by perf_events, oprofile and watchdogs. Signed-off-by: Zhigang Lu Signed-off-by: Chris Metcalf

tile: ensure interrupts disabled for preempt_schedule_irq()

2013-09-27T20:09:43Z

When coming from a page fault (for example), interrupts might be enabled as we enter the code to return from interrupt. Cc: stable@vger.kernel.org Signed-off-by: Chris Metcalf

tile: remove support for TILE64

2013-09-03T18:53:29Z

This chip is no longer being actively developed for (it was superceded by the TILEPro64 in 2008), and in any case the existing compiler and toolchain in the community do not support it. It's unlikely that the kernel works with TILE64 at this point as the configuration has not been tested in years. The support is also awkward as it requires maintaining a significant number of ifdefs. So, just remove it altogether. Signed-off-by: Chris Metcalf

tile: parameterize VA and PA space more cleanly

2013-09-03T18:47:34Z

The existing code relied on the hardware definition () to specify how much VA and PA space was available. It's convenient to allow customizing this for some configurations, so provide symbols MAX_PA_WIDTH and MAX_VA_WIDTH in that can be modified if desired. Additionally, move away from the MEM_XX_INTRPT nomenclature to define the start of various regions within the VA space. In fact the cleaner symbol is, for example, MEM_SV_START, to indicate the start of the area used for supervisor code; the actual address of the interrupt vectors is not as important, and can be changed if desired. As part of this change, convert from "intrpt1" nomenclature (which built in the old privilege-level 1 model) to a simple "intrpt". Also strip out some tilepro-specific code supporting modifying the PL the kernel could run at, since we don't actually support using different PLs in tilepro, only tilegx. Signed-off-by: Chris Metcalf