<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/tile/kernel, branch v3.6</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v3.6</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v3.6'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2012-07-25T22:22:46Z</updated>
<entry>
<title>tilepro pci: fix pci_bus.subordinate bad bombing from b918c62e</title>
<updated>2012-07-25T22:22:46Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-07-25T19:49:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7f240b7db0956a426075eca73cc7ddf9fefa22a9'/>
<id>urn:sha1:7f240b7db0956a426075eca73cc7ddf9fefa22a9</id>
<content type='text'>
The bombing to convert pci_bus.subordinate to busn_res.end accidentally
modified a "struct pci_dev" site, causing this file not to compile.
This commit reverts that code to use dev-&gt;subordinate again.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>tilegx pci: fix semantic merge conflict with 3527ed81c</title>
<updated>2012-07-25T22:22:18Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-07-25T19:40:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d41ca6dfea695777abfa35eaec863bfe2434ca54'/>
<id>urn:sha1:d41ca6dfea695777abfa35eaec863bfe2434ca54</id>
<content type='text'>
Yinghai Lu removed pci_bus.subordinate in pci-next, which meant that
the tile-next changes to add tilegx PCI support don't build.  This
was expected (seen in linux-next) and this one-line fix is along
the same lines as commit b918c62e for all other architectures.

Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2012-07-24T23:17:07Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-07-24T23:17:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6dd53aa4563a2c69e80a24d2cc68d484b5ea2891'/>
<id>urn:sha1:6dd53aa4563a2c69e80a24d2cc68d484b5ea2891</id>
<content type='text'>
Pull PCI changes from Bjorn Helgaas:
 "Host bridge hotplug:
    - Add MMCONFIG support for hot-added host bridges (Jiang Liu)
  Device hotplug:
    - Move fixups from __init to __devinit (Sebastian Andrzej Siewior)
    - Call FINAL fixups for hot-added devices, too (Myron Stowe)
    - Factor out generic code for P2P bridge hot-add (Yinghai Lu)
    - Remove all functions in a slot, not just those with _EJx (Amos
      Kong)
  Dynamic resource management:
    - Track bus number allocation (struct resource tree per domain)
      (Yinghai Lu)
    - Make P2P bridge 1K I/O windows work with resource reassignment
      (Bjorn Helgaas, Yinghai Lu)
    - Disable decoding while updating 64-bit BARs (Bjorn Helgaas)
  Power management:
    - Add PCIe runtime D3cold support (Huang Ying)
  Virtualization:
    - Add VFIO infrastructure (ACS, DMA source ID quirks) (Alex
      Williamson)
    - Add quirks for devices with broken INTx masking (Jan Kiszka)
  Miscellaneous:
    - Fix some PCI Express capability version issues (Myron Stowe)
    - Factor out some arch code with a weak, generic, pcibios_setup()
      (Myron Stowe)"

* tag 'for-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (122 commits)
  PCI: hotplug: ensure a consistent return value in error case
  PCI: fix undefined reference to 'pci_fixup_final_inited'
  PCI: build resource code for M68K architecture
  PCI: pciehp: remove unused pciehp_get_max_lnk_width(), pciehp_get_cur_lnk_width()
  PCI: reorder __pci_assign_resource() (no change)
  PCI: fix truncation of resource size to 32 bits
  PCI: acpiphp: merge acpiphp_debug and debug
  PCI: acpiphp: remove unused res_lock
  sparc/PCI: replace pci_cfg_fake_ranges() with pci_read_bridge_bases()
  PCI: call final fixups hot-added devices
  PCI: move final fixups from __init to __devinit
  x86/PCI: move final fixups from __init to __devinit
  MIPS/PCI: move final fixups from __init to __devinit
  PCI: support sizing P2P bridge I/O windows with 1K granularity
  PCI: reimplement P2P bridge 1K I/O windows (Intel P64H2)
  PCI: disable MEM decoding while updating 64-bit MEM BARs
  PCI: leave MEM and IO decoding disabled during 64-bit BAR sizing, too
  PCI: never discard enable/suspend/resume_early/resume fixups
  PCI: release temporary reference in __nv_msi_ht_cap_quirk()
  PCI: restructure 'pci_do_fixups()'
  ...
</content>
</entry>
<entry>
<title>Merge git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile</title>
<updated>2012-07-24T02:10:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-07-24T02:10:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f0a08fcb5972167e55faa330c4a24fbaa3328b1f'/>
<id>urn:sha1:f0a08fcb5972167e55faa330c4a24fbaa3328b1f</id>
<content type='text'>
Pull arch/tile updates from Chris Metcalf:
 "These changes provide support for PCIe root complex and USB host mode
  for tilegx's on-chip I/Os.

  In addition, this pull provides the required underpinning for the
  on-chip networking support that was pulled into 3.5.  The changes have
  all been through LKML (with several rounds for PCIe RC) and on
  linux-next."

* git://git.kernel.org/pub/scm/linux/kernel/git/cmetcalf/linux-tile:
  tile: updates to pci root complex from community feedback
  bounce: allow use of bounce pool via config option
  usb: add host support for the tilegx architecture
  arch/tile: provide kernel support for the tilegx USB shim
  tile pci: enable IOMMU to support DMA for legacy devices
  arch/tile: enable ZONE_DMA for tilegx
  tilegx pci: support I/O to arbitrarily-cached pages
  tile: remove unused header
  arch/tile: tilegx PCI root complex support
  arch/tile: provide kernel support for the tilegx TRIO shim
  arch/tile: break out the "csum a long" function to &lt;asm/checksum.h&gt;
  arch/tile: provide kernel support for the tilegx mPIPE shim
  arch/tile: common DMA code for the GXIO IORPC subsystem
  arch/tile: support MMIO-based readb/writeb etc.
  arch/tile: introduce GXIO IORPC framework for tilegx
</content>
</entry>
<entry>
<title>Merge branch 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2012-07-22T18:22:15Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2012-07-22T18:22:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=55acdddbac1725b80df0c41970505e8a41c84956'/>
<id>urn:sha1:55acdddbac1725b80df0c41970505e8a41c84956</id>
<content type='text'>
Pull smp/hotplug changes from Ingo Molnar:
 "Various cleanups to the SMP hotplug code - a continuing effort of
  Thomas et al"

* 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  smpboot: Remove leftover declaration
  smp: Remove num_booting_cpus()
  smp: Remove ipi_call_lock[_irq]()/ipi_call_unlock[_irq]()
  POWERPC: Smp: remove call to ipi_call_lock()/ipi_call_unlock()
  SPARC: SMP: Remove call to ipi_call_lock_irq()/ipi_call_unlock_irq()
  ia64: SMP: Remove call to ipi_call_lock_irq()/ipi_call_unlock_irq()
  x86-smp-remove-call-to-ipi_call_lock-ipi_call_unlock
  tile: SMP: Remove call to ipi_call_lock()/ipi_call_unlock()
  S390: Smp: remove call to ipi_call_lock()/ipi_call_unlock()
  parisc: Smp: remove call to ipi_call_lock()/ipi_call_unlock()
  mn10300: SMP: Remove call to ipi_call_lock()/ipi_call_unlock()
  hexagon: SMP: Remove call to ipi_call_lock()/ipi_call_unlock()
</content>
</entry>
<entry>
<title>tile: updates to pci root complex from community feedback</title>
<updated>2012-07-18T20:54:16Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-07-18T16:06:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f6d2ce00da145ae31ec22d21daca6ca5e22b3c84'/>
<id>urn:sha1:f6d2ce00da145ae31ec22d21daca6ca5e22b3c84</id>
<content type='text'>
Reviewed-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>usb: add host support for the tilegx architecture</title>
<updated>2012-07-18T20:40:29Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-05-09T17:58:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=47fc28bff82a4dd5f6b41c97e335d10fc78a8e9a'/>
<id>urn:sha1:47fc28bff82a4dd5f6b41c97e335d10fc78a8e9a</id>
<content type='text'>
This change adds OHCI and EHCI support for the tilegx's on-chip
USB hardware.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>tile pci: enable IOMMU to support DMA for legacy devices</title>
<updated>2012-07-18T20:40:17Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-06-15T19:23:06Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=41bb38fc5398ae878c799647f3c4b25374029afb'/>
<id>urn:sha1:41bb38fc5398ae878c799647f3c4b25374029afb</id>
<content type='text'>
This change uses the TRIO IOMMU to map the PCI DMA space and physical
memory at different addresses.  We also now use the dma_mapping_ops
to provide support for non-PCI DMA, PCIe DMA (64-bit) and legacy PCI
DMA (32-bit).  We use the kernel's software I/O TLB framework
(i.e. bounce buffers) for the legacy 32-bit PCI device support since
there are a limited number of TLB entries in the IOMMU and it is
non-trivial to handle indexing, searching, matching, etc.  For 32-bit
devices the performance impact of bounce buffers should not be a concern.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>arch/tile: enable ZONE_DMA for tilegx</title>
<updated>2012-07-18T20:40:11Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-05-09T16:26:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=eef015c8aa74451f848307fe5f65485070533bbb'/>
<id>urn:sha1:eef015c8aa74451f848307fe5f65485070533bbb</id>
<content type='text'>
This is required for PCI root complex legacy support and USB OHCI root
complex support.  With this change tilegx now supports allocating memory
whose PA fits in 32 bits.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
<entry>
<title>tilegx pci: support I/O to arbitrarily-cached pages</title>
<updated>2012-07-18T20:40:05Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@tilera.com</email>
</author>
<published>2012-06-13T18:46:40Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bbaa22c3a0d0be4406d26e5a73d1e8e504787986'/>
<id>urn:sha1:bbaa22c3a0d0be4406d26e5a73d1e8e504787986</id>
<content type='text'>
The tilegx PCI root complex support (currently only in linux-next)
is limited to pages that are homed on cached in the default manner,
i.e. "hash-for-home".  This change supports delivery of I/O data to
pages that are cached in other ways (locally on a particular core,
uncached, user-managed incoherent, etc.).

A large part of the change is supporting flushing pages from cache
on particular homes so that we can transition the data that we are
delivering to or from the device appropriately.  The new homecache_finv*
routines handle this.

Some changes to page_table_range_init() were also required to make
the fixmap code work correctly on tilegx; it hadn't been used there
before.

We also remove some stub mark_caches_evicted_*() routines that
were just no-ops anyway.

Signed-off-by: Chris Metcalf &lt;cmetcalf@tilera.com&gt;
</content>
</entry>
</feed>
