linux/arch/xtensa/include/asm/cacheflush.h, branch v6.7

mm: rationalise flush_icache_pages() and flush_icache_page()

2023-08-24T23:20:25Z

Move the default (no-op) implementation of flush_icache_pages() to from . Remove the flush_icache_page() wrapper from each architecture into . Link: https://lkml.kernel.org/r/20230802151406.3735276-32-willy@infradead.org Signed-off-by: Matthew Wilcox (Oracle) Signed-off-by: Andrew Morton

xtensa: implement the new page table range API

2023-08-24T23:20:24Z

Add PFN_PTE_SHIFT, update_mmu_cache_range(), flush_dcache_folio() and flush_icache_pages(). Link: https://lkml.kernel.org/r/20230802151406.3735276-30-willy@infradead.org Signed-off-by: Matthew Wilcox (Oracle) Acked-by: Mike Rapoport (IBM) Cc: Max Filippov Signed-off-by: Andrew Morton

Add linux/cacheflush.h

2021-11-17T15:36:15Z

Many architectures do not include asm-generic/cacheflush.h, so turn the includes on their head and add linux/cacheflush.h which includes asm/cacheflush.h. Move the flush_dcache_folio() declaration from asm-generic/cacheflush.h to linux/cacheflush.h and change linux/highmem.h to include linux/cacheflush.h instead of asm/cacheflush.h so that all necessary places will see flush_dcache_folio(). More functions should have their default implementations moved in the future, but those are for follow-on patches. This fixes csky, sparc and sparc64 which were missed in the commit which added flush_dcache_folio(). Fixes: 08b0b0059bf1 ("mm: Add flush_dcache_folio()") Suggested-by: Christoph Hellwig Signed-off-by: Matthew Wilcox (Oracle) Acked-by: Geert Uytterhoeven

mm: Add flush_dcache_folio()

2021-10-18T11:49:36Z

This is a default implementation which calls flush_dcache_page() on each page in the folio. If architectures can do better, they should implement their own version of it. Signed-off-by: Matthew Wilcox (Oracle) Acked-by: Vlastimil Babka

xtensa: implement flush_icache_user_range

2020-06-08T18:05:58Z

The Xtensa implementation of flush_icache_range seems to be able to cope with user addresses. Just define flush_icache_user_range to flush_icache_range. [jcmvbkbc@gmail.com: fix flush_icache_user_range in noMMU configs] Link: http://lkml.kernel.org/r/20200525221556.4270-1-jcmvbkbc@gmail.com Signed-off-by: Christoph Hellwig Signed-off-by: Max Filippov Signed-off-by: Andrew Morton Cc: Chris Zankel Cc: Max Filippov Link: http://lkml.kernel.org/r/20200515143646.3857579-23-hch@lst.de Signed-off-by: Linus Torvalds

docs: Fix some broken references

2018-06-15T21:10:01Z

As we move stuff around, some doc references are broken. Fix some of them via this script: ./scripts/documentation-file-ref-check --fix Manually checked if the produced result is valid, removing a few false-positives. Acked-by: Takashi Iwai Acked-by: Masami Hiramatsu Acked-by: Stephen Boyd Acked-by: Charles Keepax Acked-by: Mathieu Poirier Reviewed-by: Coly Li Signed-off-by: Mauro Carvalho Chehab Acked-by: Jonathan Corbet

xtensa: support DMA to high memory

2015-11-08T22:25:37Z

- don't bugcheck if high memory page is passed to xtensa_map_page; - turn empty dcache flush macros into functions so that they could be passed as function parameters; - use kmap_atomic to map high memory pages for cache invalidation/ flushing performed by xtensa_sync_single_for_{cpu,device}. Signed-off-by: Max Filippov

Revert "xtensa: cache inquiry and unaligned cache handling functions"

2015-11-03T15:37:45Z

Drop unaligned dcache management functions as they are no longer used. This reverts commit bd974240c9a7 ("xtensa: cache inquiry and unaligned cache handling functions"). Signed-off-by: Max Filippov

xtensa: nommu: don't build most of the cache flushing code

2014-10-21T09:28:50Z

Most cache flushing code is only relevant for MMU. Don't build it for nommu configuration. Signed-off-by: Max Filippov

xtensa: nommu: provide __invalidate_dcache_page_alias stub

2014-10-21T09:28:45Z

Signed-off-by: Max Filippov