<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/xtensa/kernel, branch v4.5</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.5</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.5'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2015-11-10T00:32:13Z</updated>
<entry>
<title>Merge tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux</title>
<updated>2015-11-10T00:32:13Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-11-10T00:32:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3510ca19a82ba4c6a17af79c1f0448622a406efa'/>
<id>urn:sha1:3510ca19a82ba4c6a17af79c1f0448622a406efa</id>
<content type='text'>
Pull xtensa updates from Chris Zankel:

 - fix remaining issues with noMMU cores
 - fix build for cores w/o cache or zero overhead loop options
 - fix boot of secondary cores in SMP configuration
 - add support for DMA to high memory pages
 - add dma_to_phys and phys_to_dma functions.

* tag 'xtensa-20151108' of git://github.com/czankel/xtensa-linux:
  xtensa: implement dma_to_phys and phys_to_dma
  xtensa: support DMA to high memory
  Revert "xtensa: cache inquiry and unaligned cache handling functions"
  xtensa: drop unused sections and remapped reset handlers
  xtensa: fix secondary core boot in SMP
  xtensa: add FORCE_MAX_ZONEORDER to Kconfig
  xtensa: nommu: provide defconfig for de212 on kc705
  xtensa: nommu: xtfpga: add kc705 DTS
  xtensa: add de212 core variant
  xtensa: nommu: select HAVE_FUTEX_CMPXCHG
  xtensa: nommu: fix default memory start address
  xtensa: nommu: provide correct KIO addresses
  xtensa: nommu: fix USER_RING definition
  xtensa: xtfpga: fix integer overflow in TASK_SIZE
  xtensa: fix build for configs without cache options
  xtensa: fixes for configs without loop option
</content>
</entry>
<entry>
<title>xtensa: support DMA to high memory</title>
<updated>2015-11-08T22:25:37Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2015-10-08T23:44:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c7ca9fe17b84719ef2edbe854e1b0cac04a91e2f'/>
<id>urn:sha1:c7ca9fe17b84719ef2edbe854e1b0cac04a91e2f</id>
<content type='text'>
- don't bugcheck if high memory page is passed to xtensa_map_page;
- turn empty dcache flush macros into functions so that they could be
  passed as function parameters;
- use kmap_atomic to map high memory pages for cache invalidation/
  flushing performed by xtensa_sync_single_for_{cpu,device}.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: drop unused sections and remapped reset handlers</title>
<updated>2015-11-03T14:19:39Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2015-10-16T15:30:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0d848afe117ac3e31b9d57b65553ff18ef9d288f'/>
<id>urn:sha1:0d848afe117ac3e31b9d57b65553ff18ef9d288f</id>
<content type='text'>
There are no .bootstrap or .ResetVector.text sections linked to the
vmlinux image, drop these sections from vmlinux.ld.S. Drop
RESET_VECTOR_VADDR definition only used for .ResetVector.text.

Drop remapped copies of primary and secondary reset vectors, as modern
gdb don't have problems stepping through instructions at arbitrary
locations. Drop corresponding sections from the corresponding linker
scripts.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: fix secondary core boot in SMP</title>
<updated>2015-11-03T14:19:38Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2015-10-16T14:01:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ab45fb145096799dabd18afc58bb5f97171017cd'/>
<id>urn:sha1:ab45fb145096799dabd18afc58bb5f97171017cd</id>
<content type='text'>
There are multiple factors adding to the issue in different
configurations:

- commit 17290231df16eeee ("xtensa: add fixup for double exception raised
  in window overflow") added function window_overflow_restore_a0_fixup to
  double exception vector overlapping reset vector location of secondary
  processor cores.
- on MMUv2 cores RESET_VECTOR1_VADDR may point to uncached kernel memory
  making code overlapping depend on cache type and size, so that without
  cache or with WT cache reset vector code overwrites double exception
  code, making issue even harder to detect.
- on MMUv3 cores RESET_VECTOR1_VADDR may point to unmapped area, as
  MMUv3 cores change virtual address map to match MMUv2 layout, but
  reset vector virtual address is given for the original MMUv3 mapping.
- physical memory region of the secondary reset vector is not reserved
  in the physical memory map, and thus may be allocated and overwritten
  at arbitrary moment.

Fix it as follows:

- move window_overflow_restore_a0_fixup code to .text section.
- define RESET_VECTOR1_VADDR so that it points to reset vector in the
  cacheable MMUv2 map for cores with MMU.
- reserve reset vector region in the physical memory map. Drop separate
  literal section and build mxhead.S with text section literals.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: nommu: provide correct KIO addresses</title>
<updated>2015-11-02T15:03:02Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2015-09-24T20:36:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=260c64bbabdb8da7248c87e0cdd92023bd7b76c6'/>
<id>urn:sha1:260c64bbabdb8da7248c87e0cdd92023bd7b76c6</id>
<content type='text'>
KIO region location is different for noMMU cores. Provide different
default physical address and make KIO virtual address equal to physical.

Move xtensa_get_kio_paddr function close to XCHAL_KIO_PADDR definition
and define it not only for MMUv3, but for all MMU options except MMUv2.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: fixes for configs without loop option</title>
<updated>2015-11-02T15:02:47Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2015-09-24T20:11:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5029615e25dc5040beb065f36743c127a8e51497'/>
<id>urn:sha1:5029615e25dc5040beb065f36743c127a8e51497</id>
<content type='text'>
Build-time fixes:
- make lbeg/lend/lcount save/restore conditional on kernel entry;
- don't clear lcount in platform_restart functions unconditionally.

Run-time fixes:
- use correct end of range register in __endla paired with __loopt, not
  the unused temporary register. This fixes .bss zero-initialization.
  Update comments in asmmacro.h;
- don't clobber a10 in the usercopy that leads to access to unmapped
  memory.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>clocksource: cosmetic: Drop OF 'dependency' from symbols</title>
<updated>2015-10-01T00:18:39Z</updated>
<author>
<name>Marc Zyngier</name>
<email>Marc.Zyngier@arm.com</email>
</author>
<published>2015-09-28T14:49:18Z</published>
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<id>urn:sha1:3722ed2380ad6e89eaf81fcf93f06d605e740435</id>
<content type='text'>
Seeing the 'of' characters in a symbol that is being called from
ACPI seems to freak out people. So let's do a bit of pointless
renaming so that these folks do feel at home.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Catalin Marinas &lt;catalin.marinas@arm.com&gt;
Reviewed-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Tested-by: Hanjun Guo &lt;hanjun.guo@linaro.org&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>PCI: Revert "PCI: Call pci_read_bridge_bases() from core instead of arch code"</title>
<updated>2015-09-15T18:18:04Z</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2015-09-15T18:18:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=237865f195f6b10e4724ce49eeb3972641da882a'/>
<id>urn:sha1:237865f195f6b10e4724ce49eeb3972641da882a</id>
<content type='text'>
Revert dff22d2054b5 ("PCI: Call pci_read_bridge_bases() from core instead
of arch code").

Reading PCI bridge windows is not arch-specific in itself, but there is PCI
core code that doesn't work correctly if we read them too early.  For
example, Hannes found this case on an ARM Freescale i.mx6 board:

  pci_bus 0000:00: root bus resource [mem 0x01000000-0x01efffff]
  pci 0000:00:00.0: PCI bridge to [bus 01-ff]
  pci 0000:00:00.0: BAR 8: no space for [mem size 0x01000000] (mem window)
  pci 0000:01:00.0: BAR 2: failed to assign [mem size 0x00200000]
  pci 0000:01:00.0: BAR 1: failed to assign [mem size 0x00004000]
  pci 0000:01:00.0: BAR 0: failed to assign [mem size 0x00000100]

The 00:00.0 mem window needs to be at least 3MB: the 01:00.0 device needs
0x204100 of space, and mem windows are megabyte-aligned.

Bus sizing can increase a bridge window size, but never *decrease* it (see
d65245c3297a ("PCI: don't shrink bridge resources")).  Prior to
dff22d2054b5, ARM didn't read bridge windows at all, so the "original size"
was zero, and we assigned a 3MB window.

After dff22d2054b5, we read the bridge windows before sizing the bus.  The
firmware programmed a 16MB window (size 0x01000000) in 00:00.0, and since
we never decrease the size, we kept 16MB even though we only needed 3MB.
But 16MB doesn't fit in the host bridge aperture, so we failed to assign
space for the window and the downstream devices.

I think this is a defect in the PCI core: we shouldn't rely on the firmware
to assign sensible windows.

Ray reported a similar problem, also on ARM, with Broadcom iProc.

Issues like this are too hard to fix right now, so revert dff22d2054b5.

Reported-by: Hannes &lt;oe5hpm@gmail.com&gt;
Reported-by: Ray Jui &lt;rjui@broadcom.com&gt;
Link: http://lkml.kernel.org/r/CAAa04yFQEUJm7Jj1qMT57-LG7ZGtnhNDBe=PpSRa70Mj+XhW-A@mail.gmail.com
Link: http://lkml.kernel.org/r/55F75BB8.4070405@broadcom.com
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Yinghai Lu &lt;yinghai@kernel.org&gt;
Acked-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;</content>
</entry>
<entry>
<title>Merge branch 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2015-09-01T21:33:35Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-09-01T21:33:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=17e6b00ac422b49d44a0b8d98402a211f726282d'/>
<id>urn:sha1:17e6b00ac422b49d44a0b8d98402a211f726282d</id>
<content type='text'>
Pull irq updates from Thomas Gleixner:
 "This updated pull request does not contain the last few GIC related
  patches which were reported to cause a regression.  There is a fix
  available, but I let it breed for a couple of days first.

  The irq departement provides:

   - new infrastructure to support non PCI based MSI interrupts
   - a couple of new irq chip drivers
   - the usual pile of fixlets and updates to irq chip drivers
   - preparatory changes for removal of the irq argument from interrupt
     flow handlers
   - preparatory changes to remove IRQF_VALID"

* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (129 commits)
  irqchip/imx-gpcv2: IMX GPCv2 driver for wakeup sources
  irqchip: Add bcm2836 interrupt controller for Raspberry Pi 2
  irqchip: Add documentation for the bcm2836 interrupt controller
  irqchip/bcm2835: Add support for being used as a second level controller
  irqchip/bcm2835: Refactor handle_IRQ() calls out of MAKE_HWIRQ
  PCI: xilinx: Fix typo in function name
  irqchip/gic: Ensure gic_cpu_if_up/down() programs correct GIC instance
  irqchip/gic: Only allow the primary GIC to set the CPU map
  PCI/MSI: pci-xgene-msi: Consolidate chained IRQ handler install/remove
  unicore32/irq: Prepare puv3_gpio_handler for irq argument removal
  tile/pci_gx: Prepare trio_handle_level_irq for irq argument removal
  m68k/irq: Prepare irq handlers for irq argument removal
  C6X/megamode-pic: Prepare megamod_irq_cascade for irq argument removal
  blackfin: Prepare irq handlers for irq argument removal
  arc/irq: Prepare idu_cascade_isr for irq argument removal
  sparc/irq: Use access helper irq_data_get_affinity_mask()
  sparc/irq: Use helper irq_data_get_irq_handler_data()
  parisc/irq: Use access helper irq_data_get_affinity_mask()
  mn10300/irq: Use access helper irq_data_get_affinity_mask()
  irqchip/i8259: Prepare i8259_irq_dispatch for irq argument removal
  ...
</content>
</entry>
<entry>
<title>Merge branch 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2015-09-01T21:04:50Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-09-01T21:04:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5e359bf2219d8622eb0931701e45af55db323228'/>
<id>urn:sha1:5e359bf2219d8622eb0931701e45af55db323228</id>
<content type='text'>
Pull timer updates from Thomas Gleixner:
 "Rather large, but nothing exiting:

   - new range check for settimeofday() to prevent that boot time
     becomes negative.
   - fix for file time rounding
   - a few simplifications of the hrtimer code
   - fix for the proc/timerlist code so the output of clock realtime
     timers is accurate
   - more y2038 work
   - tree wide conversion of clockevent drivers to the new callbacks"

* 'timers-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (88 commits)
  hrtimer: Handle failure of tick_init_highres() gracefully
  hrtimer: Unconfuse switch_hrtimer_base() a bit
  hrtimer: Simplify get_target_base() by returning current base
  hrtimer: Drop return code of hrtimer_switch_to_hres()
  time: Introduce timespec64_to_jiffies()/jiffies_to_timespec64()
  time: Introduce current_kernel_time64()
  time: Introduce struct itimerspec64
  time: Add the common weak version of update_persistent_clock()
  time: Always make sure wall_to_monotonic isn't positive
  time: Fix nanosecond file time rounding in timespec_trunc()
  timer_list: Add the base offset so remaining nsecs are accurate for non monotonic timers
  cris/time: Migrate to new 'set-state' interface
  kernel: broadcast-hrtimer: Migrate to new 'set-state' interface
  xtensa/time: Migrate to new 'set-state' interface
  unicore/time: Migrate to new 'set-state' interface
  um/time: Migrate to new 'set-state' interface
  sparc/time: Migrate to new 'set-state' interface
  sh/localtimer: Migrate to new 'set-state' interface
  score/time: Migrate to new 'set-state' interface
  s390/time: Migrate to new 'set-state' interface
  ...
</content>
</entry>
</feed>
