<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/arch/xtensa, branch v4.9</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.9</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.9'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2016-11-14T20:31:49Z</updated>
<entry>
<title>xtensa: wire up new pkey_{mprotect,alloc,free} syscalls</title>
<updated>2016-11-14T20:31:49Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2016-11-14T20:31:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=709fb1f961ea5c287107c3f903e81c9529224c8b'/>
<id>urn:sha1:709fb1f961ea5c287107c3f903e81c9529224c8b</id>
<content type='text'>
Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: clean up printk usage for boot/crash logging</title>
<updated>2016-11-07T07:31:46Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2016-11-04T21:45:08Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d4eccafcaf339de77ec562e96e6b223d447f924a'/>
<id>urn:sha1:d4eccafcaf339de77ec562e96e6b223d447f924a</id>
<content type='text'>
Convert printk(KERN_* to pr_* and printk's without level to pr_cont.
This fixes torn register dumps, stack dumps, stack traces and timestamps
in the middle of 'Calibrating CPU frequency' message.
Also drop unused show_code and drop false comment about show_stack.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'work.uaccess2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs</title>
<updated>2016-10-12T06:38:39Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-10-12T06:38:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4cdf8dbe2d4b3891a9abd9f9ec32acbe58de0cf6'/>
<id>urn:sha1:4cdf8dbe2d4b3891a9abd9f9ec32acbe58de0cf6</id>
<content type='text'>
Pull uaccess.h prepwork from Al Viro:
 "Preparations to tree-wide switch to use of linux/uaccess.h (which,
  obviously, will allow to start unifying stuff for real). The last step
  there, ie

    PATT='^[[:blank:]]*#[[:blank:]]*include[[:blank:]]*&lt;asm/uaccess.h&gt;'
    sed -i -e "s!$PATT!#include &lt;linux/uaccess.h&gt;!" \
            `git grep -l "$PATT"|grep -v ^include/linux/uaccess.h`

  is not taken here - I would prefer to do it once just before or just
  after -rc1.  However, everything should be ready for it"

* 'work.uaccess2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs:
  remove a stray reference to asm/uaccess.h in docs
  sparc64: separate extable_64.h, switch elf_64.h to it
  score: separate extable.h, switch module.h to it
  mips: separate extable.h, switch module.h to it
  x86: separate extable.h, switch sections.h to it
  remove stray include of asm/uaccess.h from cacheflush.h
  mn10300: remove a bogus processor.h-&gt;uaccess.h include
  xtensa: split uaccess.h into C and asm sides
  bonding: quit messing with IOCTL
  kill __kernel_ds_p off
  mn10300: finish verify_area() off
  frv: move HAVE_ARCH_UNMAPPED_AREA to pgtable.h
  exceptions: detritus removal
</content>
</entry>
<entry>
<title>Merge branch 'mm-pkeys-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2016-10-10T18:01:51Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-10-10T18:01:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=93c26d7dc02380fe11e57ff0d152368743762169'/>
<id>urn:sha1:93c26d7dc02380fe11e57ff0d152368743762169</id>
<content type='text'>
Pull protection keys syscall interface from Thomas Gleixner:
 "This is the final step of Protection Keys support which adds the
  syscalls so user space can actually allocate keys and protect memory
  areas with them. Details and usage examples can be found in the
  documentation.

  The mm side of this has been acked by Mel"

* 'mm-pkeys-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/pkeys: Update documentation
  x86/mm/pkeys: Do not skip PKRU register if debug registers are not used
  x86/pkeys: Fix pkeys build breakage for some non-x86 arches
  x86/pkeys: Add self-tests
  x86/pkeys: Allow configuration of init_pkru
  x86/pkeys: Default to a restrictive init PKRU
  pkeys: Add details of system call use to Documentation/
  generic syscalls: Wire up memory protection keys syscalls
  x86: Wire up protection keys system calls
  x86/pkeys: Allocation/free syscalls
  x86/pkeys: Make mprotect_key() mask off additional vm_flags
  mm: Implement new pkey_mprotect() system call
  x86/pkeys: Add fault handling for PF_PK page fault bit
</content>
</entry>
<entry>
<title>nmi_backtrace: generate one-line reports for idle cpus</title>
<updated>2016-10-08T01:46:30Z</updated>
<author>
<name>Chris Metcalf</name>
<email>cmetcalf@mellanox.com</email>
</author>
<published>2016-10-08T00:02:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6727ad9e206cc08b80d8000a4d67f8417e53539d'/>
<id>urn:sha1:6727ad9e206cc08b80d8000a4d67f8417e53539d</id>
<content type='text'>
When doing an nmi backtrace of many cores, most of which are idle, the
output is a little overwhelming and very uninformative.  Suppress
messages for cpus that are idling when they are interrupted and just
emit one line, "NMI backtrace for N skipped: idling at pc 0xNNN".

We do this by grouping all the cpuidle code together into a new
.cpuidle.text section, and then checking the address of the interrupted
PC to see if it lies within that section.

This commit suitably tags x86 and tile idle routines, and only adds in
the minimal framework for other architectures.

Link: http://lkml.kernel.org/r/1472487169-14923-5-git-send-email-cmetcalf@mellanox.com
Signed-off-by: Chris Metcalf &lt;cmetcalf@mellanox.com&gt;
Acked-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Tested-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Tested-by: Daniel Thompson &lt;daniel.thompson@linaro.org&gt; [arm]
Tested-by: Petr Mladek &lt;pmladek@suse.com&gt;
Cc: Aaron Tomlin &lt;atomlin@redhat.com&gt;
Cc: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: "Rafael J. Wysocki" &lt;rjw@rjwysocki.net&gt;
Cc: Russell King &lt;linux@arm.linux.org.uk&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Ingo Molnar &lt;mingo@elte.hu&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa</title>
<updated>2016-10-06T00:44:48Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-10-06T00:44:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d8ea757b25ec82687c497fc90aa83f9bcea24b5b'/>
<id>urn:sha1:d8ea757b25ec82687c497fc90aa83f9bcea24b5b</id>
<content type='text'>
Pull Xtensa updates from Max Filippov:
 "Updates for the xtensa architecture.  It is a combined set of patches
  for 4.8 that never got to the mainline and new patches for 4.9.

   - add new kernel memory layouts for MMUv3 cores: with 256MB and 512MB
     KSEG size, starting at physical address other than 0

   - make kernel load address configurable

   - clean up kernel memory layout macros

   - drop sysmem early allocator and switch to memblock

   - enable kmemleak and memory reservation from the device tree

   - wire up new syscalls: userfaultfd, membarrier, mlock2,
     copy_file_range, preadv2 and pwritev2

   - add new platform: Cadence Configurable System Platform (CSP) and
     new core variant for it: xt_lnx

   - rearrange CCOUNT calibration code, make most of it generic

   - improve machine reset code (XTFPGA now reboots reliably with MMUv3
     cores)

   - provide default memmap command line option for configurations
     without device tree support

   - ISS fixes: simdisk is now capable of using highmem pages, panic
     correctly terminates simulator"

* tag 'xtensa-20161005' of git://github.com/jcmvbkbc/linux-xtensa: (24 commits)
  xtensa: disable MMU initialization option on MMUv2 cores
  xtensa: add default memmap and mmio32native options to defconfigs
  xtensa: add default memmap option to common_defconfig
  xtensa: add default memmap option to iss_defconfig
  xtensa: ISS: allow simdisk to use high memory buffers
  xtensa: ISS: define simc_exit and use it instead of inline asm
  xtensa: xtfpga: group platform_* functions together
  xtensa: rearrange CCOUNT calibration
  xtensa: xtfpga: use clock provider, don't update DT
  xtensa: Tweak xuartps UART driver Rx watermark for Cadence CSP config.
  xtensa: initialize MMU before jumping to reset vector
  xtensa: fix icountlevel setting in cpu_reset
  xtensa: extract common CPU reset code into separate function
  xtensa: Added Cadence CSP kernel configuration for Xtensa
  xtensa: fix default kernel load address
  xtensa: wire up new syscalls
  xtensa: support reserved-memory DT node
  xtensa: drop sysmem and switch to memblock
  xtensa: minimize use of PLATFORM_DEFAULT_MEM_{ADDR,SIZE}
  xtensa: cleanup MMU setup and kernel layout macros
  ...
</content>
</entry>
<entry>
<title>xtensa: disable MMU initialization option on MMUv2 cores</title>
<updated>2016-09-29T19:55:00Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2016-09-29T17:51:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a4c6be5ad1d0c7af0c5421b68a00b6406b28a325'/>
<id>urn:sha1:a4c6be5ad1d0c7af0c5421b68a00b6406b28a325</id>
<content type='text'>
MMU initialization option is currently ignored on MMUv2 cores, but it is
used in Kconfig to select kernel load and start addresses. This choice
is not available for MMUv2 cores as they have hardwired TLB entries.
Disable MMU initialization option for known MMUv2 cores so that they get
correct kernel load/start address by default.
This fixes the default allmodconfig build.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
<entry>
<title>xtensa: split uaccess.h into C and asm sides</title>
<updated>2016-09-28T01:15:21Z</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2016-09-04T18:26:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=76580237d13fbfcd55acbc8fdd6726be7080a275'/>
<id>urn:sha1:76580237d13fbfcd55acbc8fdd6726be7080a275</id>
<content type='text'>
Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>exceptions: detritus removal</title>
<updated>2016-09-28T01:15:14Z</updated>
<author>
<name>Al Viro</name>
<email>viro@zeniv.linux.org.uk</email>
</author>
<published>2016-08-12T22:47:45Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=df720ac12fc76d235a1b0d7ebccd14b23085c24e'/>
<id>urn:sha1:df720ac12fc76d235a1b0d7ebccd14b23085c24e</id>
<content type='text'>
externs and defines for stuff that is never used

Signed-off-by: Al Viro &lt;viro@zeniv.linux.org.uk&gt;
</content>
</entry>
<entry>
<title>xtensa: add default memmap and mmio32native options to defconfigs</title>
<updated>2016-09-21T03:43:24Z</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2016-09-21T02:35:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5b8b3c860ba48f8ac1830cf3a7d02e781de06894'/>
<id>urn:sha1:5b8b3c860ba48f8ac1830cf3a7d02e781de06894</id>
<content type='text'>
Now that memory initialization doesn't add default memory region
specify it explicitly in the memmap command line option in case somebody
wants to boot in non-DT-enabled configuration.

While at it update earlycon access mode to mmio32native to support both
LE and BE cores transparently.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
</content>
</entry>
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