<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/bus, branch v3.11</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v3.11</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v3.11'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2013-07-02T21:23:01Z</updated>
<entry>
<title>Merge tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2013-07-02T21:23:01Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2013-07-02T21:23:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ee1a8d402e7e204d57fb108aa40003b6d1633036'/>
<id>urn:sha1:ee1a8d402e7e204d57fb108aa40003b6d1633036</id>
<content type='text'>
Pull ARM SoC device tree changes from Arnd Bergmann:
 "These changes from 30 individual branches for the most part update
  device tree files, but there are also a few source code changes that
  have crept in this time, usually in order to atomically move over a
  driver from using hardcoded data to DT probing.

  A number of platforms change their DT files to use the C preprocessor,
  which is causing a bit of churn, but that is hopefully only this once"

* tag 'dt-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (372 commits)
  ARM: at91: dt: rm9200ek: add spi support
  ARM: at91: dt: rm9200: add spi support
  ARM: at91/DT: at91sam9n12: add SPI DMA client infos
  ARM: at91/DT: sama5d3: add SPI DMA client infos
  ARM: at91/DT: fix SPI compatibility string
  ARM: Kirkwood: Fix the internal register ranges translation
  ARM: dts: bcm281xx: change comment to C89 style
  ARM: mmc: bcm281xx SDHCI driver (dt mods)
  ARM: nomadik: add the new clocks to the device tree
  clk: nomadik: implement the Nomadik clocks properly
  ARM: dts: omap5-uevm: Provide USB Host PHY clock frequency
  ARM: dts: omap4-panda: Fix DVI EDID reads
  ARM: dts: omap4-panda: Add USB Host support
  arm: mvebu: enable mini-PCIe connectors on Armada 370 RD
  ARM: shmobile: irqpin: add a DT property to enable masking on parent
  ARM: dts: AM43x EPOS EVM support
  ARM: dts: OMAP5: Add bandgap DT entry
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to am335x EVM
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to EVMsk
  ARM: dts: AM33XX: Add pinmux configuration for CPSW to beaglebone
  ...
</content>
</entry>
<entry>
<title>Merge tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc</title>
<updated>2013-07-02T20:43:38Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2013-07-02T20:43:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3883cbb6c1bda013a3ce2dbdab7dc97c52e4a232'/>
<id>urn:sha1:3883cbb6c1bda013a3ce2dbdab7dc97c52e4a232</id>
<content type='text'>
Pull ARM SoC specific changes from Arnd Bergmann:
 "These changes are all to SoC-specific code, a total of 33 branches on
  17 platforms were pulled into this.  Like last time, Renesas sh-mobile
  is now the platform with the most changes, followed by OMAP and
  EXYNOS.

  Two new platforms, TI Keystone and Rockchips RK3xxx are added in this
  branch, both containing almost no platform specific code at all, since
  they are using generic subsystem interfaces for clocks, pinctrl,
  interrupts etc.  The device drivers are getting merged through the
  respective subsystem maintainer trees.

  One more SoC (u300) is now multiplatform capable and several others
  (shmobile, exynos, msm, integrator, kirkwood, clps711x) are moving
  towards that goal with this series but need more work.

  Also noteworthy is the work on PCI here, which is traditionally part
  of the SoC specific code.  With the changes done by Thomas Petazzoni,
  we can now more easily have PCI host controller drivers as loadable
  modules and keep them separate from the platform code in
  drivers/pci/host.  This has already led to the discovery that three
  platforms (exynos, spear and imx) are actually using an identical PCIe
  host controller and will be able to share a driver once support for
  spear and imx is added."

* tag 'soc-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (480 commits)
  ARM: integrator: let pciv3 use mem/premem from device tree
  ARM: integrator: set local side PCI addresses right
  ARM: dts: Add pcie controller node for exynos5440-ssdk5440
  ARM: dts: Add pcie controller node for Samsung EXYNOS5440 SoC
  ARM: EXYNOS: Enable PCIe support for Exynos5440
  pci: Add PCIe driver for Samsung Exynos
  ARM: OMAP5: voltagedomain data: remove temporary OMAP4 voltage data
  ARM: keystone: Move CPU bringup code to dedicated asm file
  ARM: multiplatform: always pick one CPU type
  ARM: imx: select syscon for IMX6SL
  ARM: keystone: select ARM_ERRATA_798181 only for SMP
  ARM: imx: Synertronixx scb9328 needs to select SOC_IMX1
  ARM: OMAP2+: AM43x: resolve SMP related build error
  dmaengine: edma: enable build for AM33XX
  ARM: edma: Add EDMA crossbar event mux support
  ARM: edma: Add DT and runtime PM support to the private EDMA API
  dmaengine: edma: Add TI EDMA device tree binding
  arm: add basic support for Rockchip RK3066a boards
  arm: add debug uarts for rockchip rk29xx and rk3xxx series
  arm: Add basic clocks for Rockchip rk3066a SoCs
  ...
</content>
</entry>
<entry>
<title>drivers: bus: add a new driver for WEIM</title>
<updated>2013-06-17T08:04:28Z</updated>
<author>
<name>Huang Shijie</name>
<email>b32955@freescale.com</email>
</author>
<published>2013-05-28T06:20:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=85bf6d4e4b100efda8169f6f98fd65d0029c7813'/>
<id>urn:sha1:85bf6d4e4b100efda8169f6f98fd65d0029c7813</id>
<content type='text'>
The WEIM(Wireless External Interface Module) works like a bus.
You can attach many different devices on it, such as NOR, onenand.

In the case of i.MX6q-sabreauto, the NOR is connected to WEIM.

This patch also adds the devicetree binding document.
The driver only works when the devicetree is enabled.

Signed-off-by: Huang Shijie &lt;b32955@freescale.com&gt;
Acked-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Signed-off-by: Shawn Guo &lt;shawn.guo@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'cleanup-3.11-4' of git://git.infradead.org/users/jcooper/linux into next/cleanup</title>
<updated>2013-06-14T21:57:44Z</updated>
<author>
<name>Olof Johansson</name>
<email>olof@lixom.net</email>
</author>
<published>2013-06-14T21:57:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=19a7ab612428cb9ab6161552202ffa095c6f3bcc'/>
<id>urn:sha1:19a7ab612428cb9ab6161552202ffa095c6f3bcc</id>
<content type='text'>
From Jason Cooper, mvebu cleanup for v3.11 (round 4):
 - use pr_fmt in mvebu-mbus driver

* tag 'cleanup-3.11-4' of git://git.infradead.org/users/jcooper/linux:
  bus: mvebu-mbus: Use pr_fmt

Signed-off-by: Olof Johansson &lt;olof@lixom.net&gt;
</content>
</entry>
<entry>
<title>bus: mvebu-mbus: Use pr_fmt</title>
<updated>2013-06-08T14:10:19Z</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@free-electrons.com</email>
</author>
<published>2013-06-07T16:47:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b15d0b5256056a67c5cb14c2d4d46dd12c8bfb99'/>
<id>urn:sha1:b15d0b5256056a67c5cb14c2d4d46dd12c8bfb99</id>
<content type='text'>
In order to clean message printing, we replace pr_info with pr_fmt.
This is purely cosmetic change, with the sole purpose of making
the code a bit more readable.

Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@free-electrons.com&gt;
Acked-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
</content>
</entry>
<entry>
<title>drivers/bus: arm-cci: fix combined ARMv6+v7 build</title>
<updated>2013-06-03T13:26:08Z</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2013-06-03T13:15:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f49024926236068bc3fe6848aaf87b914049013a'/>
<id>urn:sha1:f49024926236068bc3fe6848aaf87b914049013a</id>
<content type='text'>
When we build a kernel with support for both ARMv6 and ARMv7,
gas is trying to be helpful by pointing out that the arm-cci
driver would not work on ARMv6:

/tmp/ccu1LDeU.s: Assembler messages:
/tmp/ccu1LDeU.s:450: Error: selected processor does not support ARM mode `wfi '
/tmp/ccu1LDeU.s:451: Error: selected processor does not support ARM mode `wfe '
make[4]: *** [drivers/bus/arm-cci.o] Error 1

We know that the driver will only be used on ARMv7, hence we
can annotate the inline assembly listing to allow those instructions.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Cc: Dave Martin &lt;dave.martin@linaro.org&gt;
</content>
</entry>
<entry>
<title>ARM: OMAP2+: Remove omap4 ocp2scp pdata</title>
<updated>2013-05-30T20:09:31Z</updated>
<author>
<name>Tony Lindgren</name>
<email>tony@atomide.com</email>
</author>
<published>2013-05-30T19:53:07Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=82c5cde1c4b01a62c9a19c9118b4b434c333ce86'/>
<id>urn:sha1:82c5cde1c4b01a62c9a19c9118b4b434c333ce86</id>
<content type='text'>
This is omap4+ only and no longer needed as omap4+ can be booted
using device tree.

Also remove the related pdata handling from the driver and the
now unneeded platform_data/omap_ocp2scp.h.

Cc: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Olof Johansson &lt;olof@lixom.net&gt;
Reviewed-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Acked-by: Felipe Balbi &lt;balbi@ti.com&gt;
Signed-off-by: Tony Lindgren &lt;tony@atomide.com&gt;
</content>
</entry>
<entry>
<title>drivers/bus: arm-cci: function to enable CCI ports from early boot code</title>
<updated>2013-05-29T19:50:34Z</updated>
<author>
<name>Nicolas Pitre</name>
<email>nicolas.pitre@linaro.org</email>
</author>
<published>2013-05-22T03:34:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=62158f817ad3e0368480b8e9480be34bffd8c74a'/>
<id>urn:sha1:62158f817ad3e0368480b8e9480be34bffd8c74a</id>
<content type='text'>
This provides cci_enable_port_for_self().  This is the counterpart to
cci_disable_port_by_cpu(self).

This is meant to be called from the MCPM machine specific power_up_setup
callback code when the appropriate affinity level needs to be initialized.
The code therefore has to be position independent as the MMU is still off
and it cannot rely on any stack space.

Signed-off-by: Nicolas Pitre &lt;nico@linaro.org&gt;
Reviewed-by: Dave Martin &lt;dave.martin@linaro.org&gt;
</content>
</entry>
<entry>
<title>drivers: bus: add ARM CCI support</title>
<updated>2013-05-29T19:50:34Z</updated>
<author>
<name>Lorenzo Pieralisi</name>
<email>lorenzo.pieralisi@arm.com</email>
</author>
<published>2012-07-13T14:55:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ed69bdd8fd9b2db68b915ce5f60fc51d4744a9b1'/>
<id>urn:sha1:ed69bdd8fd9b2db68b915ce5f60fc51d4744a9b1</id>
<content type='text'>
On ARM multi-cluster systems coherency between cores running on
different clusters is managed by the cache-coherent interconnect (CCI).
It allows broadcasting of TLB invalidates and memory barriers and it
guarantees cache coherency at system level through snooping of slave
interfaces connected to it.

This patch enables the basic infrastructure required in Linux to handle and
programme the CCI component.

Non-local variables used by the CCI management functions called by power
down function calls after disabling the cache must be flushed out to main
memory in advance, otherwise incoherency of those values may occur if they
are sitting in the cache of some other CPU when power down functions
execute. Driver code ensures that relevant data structures are flushed
from inner and outer caches after the driver probe is completed.

CCI slave port resources are linked to set of CPUs through bus masters
phandle properties that link the interface resources to masters node in
the device tree.

Documentation describing the CCI DT bindings is provided with the patch.

Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Nicolas Pitre &lt;nicolas.pitre@linaro.org&gt;
</content>
</entry>
<entry>
<title>bus: mvebu: fix mistake in PCIe window target attribute for Kirkwood</title>
<updated>2013-04-11T17:05:37Z</updated>
<author>
<name>Thomas Petazzoni</name>
<email>thomas.petazzoni@free-electrons.com</email>
</author>
<published>2013-04-10T22:20:28Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8d7297b48d6d76f1cb077f87735c7d912f82e8cc'/>
<id>urn:sha1:8d7297b48d6d76f1cb077f87735c7d912f82e8cc</id>
<content type='text'>
The target and attributes for the PCIe address decoding windows were
not correct on Kirkwood for the second PCIe interface.

Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Signed-off-by: Jason Cooper &lt;jason@lakedaemon.net&gt;
</content>
</entry>
</feed>
