linux/drivers/clk/microchip, branch v6.3

kbuild, clk: remove MODULE_LICENSE in non-modules

2023-03-06T19:29:18Z

Since commit 8b41fc4454e ("kbuild: create modules.builtin without Makefile.modbuiltin or tristate.conf"), MODULE_LICENSE declarations are used to identify modules. As a consequence, uses of the macro in non-modules will cause modprobe to misidentify their containing object file as a module when it is not (false positives), and modprobe might succeed rather than failing with a suitable error message. So remove it in the files in this commit, none of which can be built as modules. Signed-off-by: Nick Alcock Suggested-by: Luis Chamberlain Cc: Luis Chamberlain Cc: linux-modules@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Hitomi Hasegawa Cc: Michael Turquette Cc: Stephen Boyd Cc: linux-clk@vger.kernel.org Link: https://lore.kernel.org/r/20230222121453.91915-13-nick.alcock@oracle.com Acked-by: Conor Dooley Reviewed-by: Conor Dooley Signed-off-by: Stephen Boyd

clk: microchip: mpfs-ccc: Use devm_kasprintf() for allocating formatted strings

2023-01-19T09:45:35Z

In various places, string buffers of a fixed size are allocated, and filled using snprintf() with the same fixed size, which is error-prone. Replace this by calling devm_kasprintf() instead, which always uses the appropriate size. While at it, remove an unneeded intermediate variable, which allows us to drop a cast as a bonus. With the initial behavior it would have been possible to have a device tree with a node address that would make "ccc_pll" exceed 18 characters. If that happened, the would be cut off & both pll 0 & 1 would be named identically. If that happens, pll1 would fail to register. Thus, the fixes tag has been added to this commit. Fixes: d39fb172760e ("clk: microchip: add PolarFire SoC fabric clock support") Signed-off-by: Geert Uytterhoeven Reviewed-by: Conor Dooley Tested-by: Conor Dooley [claudiu.beznea: added the rationale behind fixes tag] Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/f904fd28b2087d1463ea65f059924e3b1acc193c.1672764239.git.geert+renesas@glider.be

clk: microchip: enable the MPFS clk driver by default if SOC_MICROCHIP_POLARFIRE

2022-12-09T01:12:08Z

With the intent of removing driver selects from Kconfig.socs in arch/riscv, essential drivers that were being selected there could instead by enabled by defaulting them to the value of the SoC's Kconfig symbol. Do so here & drop the depend on RISC-V - the SOC_ symbols are only defined there anyway. Signed-off-by: Conor Dooley Link: https://lore.kernel.org/r/20221123161921.81195-1-conor@kernel.org Signed-off-by: Stephen Boyd

clk: microchip: check for null return of devm_kzalloc()

2022-11-24T10:44:13Z

Because of the possible failure of devm_kzalloc(), name might be NULL and will cause null pointer dereference later. Therefore, it might be better to check it and directly return -ENOMEM. Fixes: d39fb172760e ("clk: microchip: add PolarFire SoC fabric clock support") Signed-off-by: Hui Tang Reviewed-by: Conor Dooley [claudiu.beznea: s/refrence/reference/, s/possilble/possible] Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20221119054858.178629-1-tanghui20@huawei.com

clk: microchip: add PolarFire SoC fabric clock support

2022-09-14T07:57:07Z

Add a driver to support the PLLs in PolarFire SoC's Clock Conditioning Circuitry, an instance of which is located in each ordinal corner of the FPGA. Only get_rate() is supported as these clocks are intended to be statically configured by the FPGA design. Currently, the DLLs are not supported by this driver. For more information on the hardware, see "PolarFire SoC FPGA Clocking Resources" in the link below. Link: https://onlinedocs.microchip.com/pr/GUID-8F0CC4C0-0317-4262-89CA-CE7773ED1931-en-US-1/index.html Signed-off-by: Conor Dooley Reviewed-by: Claudiu Beznea Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220908143651.1252601-5-conor.dooley@microchip.com

clk: microchip: mpfs: update module authorship & licencing

2022-09-14T07:57:07Z

Padmarao wrote the driver in its original, pre upstream form. Daire & myself have been responsible for getting it upstreamable and subsequent development. Move Daire out of the blurb & into a MODULE_AUTHOR entry & add entries for myself and Padmarao. While we are at it, convert the MODULE_LICENSE field to its preferred form of "GPL". Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220909123123.2699583-15-conor.dooley@microchip.com

clk: microchip: mpfs: convert periph_clk to clk_gate

2022-09-14T07:57:07Z

With the reset code moved to the recently added reset controller, there is no need for custom ops any longer. Remove the custom ops and the custom struct by converting to a clk_gate. Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley Reviewed-by: Claudiu Beznea Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220909123123.2699583-14-conor.dooley@microchip.com

clk: microchip: mpfs: convert cfg_clk to clk_divider

2022-09-14T07:57:06Z

The cfg_clk struct is now just a redefinition of the clk_divider struct with custom implentations of the ops, that implement an extra level of redirection. Remove the custom struct and replace it with clk_divider. Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley Reviewed-by: Claudiu Beznea Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220909123123.2699583-13-conor.dooley@microchip.com

clk: microchip: mpfs: delete 2 line mpfs_clk_register_foo()

2022-09-14T07:57:06Z

The register functions are now comprised of only a single operation each and no longer add anything to the driver. Delete them. Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley Reviewed-by: Claudiu Beznea Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220909123123.2699583-12-conor.dooley@microchip.com

clk: microchip: mpfs: simplify control reg access

2022-09-14T07:57:06Z

The control reg addresses are known when the clocks are registered, so we can, instead of assigning a base pointer to the structs, assign the control reg addresses directly. Accordingly, remove the interim variables used during reads/writes to those registers. Reviewed-by: Daire McNamara Signed-off-by: Conor Dooley Reviewed-by: Claudiu Beznea Signed-off-by: Claudiu Beznea Link: https://lore.kernel.org/r/20220909123123.2699583-11-conor.dooley@microchip.com