linux/drivers/clk, branch v4.3

Merge branch 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm

2015-10-27T22:24:53Z

Pull ARM fixes from Russell King: "Two fixes for ARM and one for clkdev: - Fix another build issue with vdsomunge on non-glibc systems - Fix a randconfig build error caused by an invalid configuration - Fix a clkdev problem causing the Nokia n700 to no longer boot" * 'fixes' of git://ftp.arm.linux.org.uk/~rmk/linux-arm: clkdev: fix clk_add_alias() with a NULL alias device name ARM: 8445/1: fix vdsomunge not to depend on glibc specific byteswap.h ARM: make RiscPC depend on MMU

clkdev: fix clk_add_alias() with a NULL alias device name

2015-10-20T16:24:08Z

clk_add_alias() was not correctly handling the case where alias_dev_name was NULL: rather than producing an entry with a NULL dev_id pointer, it would produce a device name of (null). Fix this. Cc: Fixes: 2568999835d7 ("clkdev: add clkdev_create() helper") Reported-by: Aaro Koskinen Tested-by: Aaro Koskinen Signed-off-by: Russell King

Partially revert "clk: mvebu: Convert to clk_hw based provider APIs"

2015-10-14T18:28:17Z

This partially reverts commit eca61c9ff2588e1df373e61078e1874976315839. Thomas reports that it causes regressions on Armada XP devices. This is because of_clk_get_parent_name() relies on the property 'clock-output-names' to resolve the name of a clock's parent, without trying to get the clock from the framework and call __clk_get_name(). Given that Armada XP devices don't have the 'clock-output-names' property, of_clk_get_parent_name() returns the name of the node which doesn't match the actual parent clock's name at all, causing CPU clocks to never link up with their parents. Reported-by: Thomas Petazzoni Signed-off-by: Stephen Boyd

Merge branch 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm into clk-fixes

2015-10-02T18:22:23Z

Pull fixes from Tero Kristo: "A few TI clock driver fixes to pull against 4.3-rc" * 'for-4.3-rc/ti-clk-fixes' of https://github.com/t-kristo/linux-pm: (3 commits) clk: ti: dflt: fix enable_reg validity check clk: ti: fix dual-registration of uart4_ick clk: ti: clk-7xx: Remove hardwired ABE clock configuration

clk: ti: dflt: fix enable_reg validity check

2015-10-02T06:24:28Z

The default clock enabling functions for TI clocks - omap2_dflt_clk_enable() and omap2_dflt_clk_disable() perform a NULL check for the enable_reg field of the clk_hw_omap structure. This enable_reg field however is merely a combination of the index of the master IP module, and the offset from the master IP module's base address. A value of 0 is perfectly valid, and the current error checking will fail in these cases. The issue was found when trying to enable the iva2_ck clock on OMAP3 platforms. So, switch the check to use IS_ERR. This correction is similar to the logic used in commit c807dbedb5e5 ("clk: ti: fix ti_clk_get_reg_addr error handling"). Fixes: 9f37e90efaf0 ("clk: ti: dflt: move support for default gate clock..") Signed-off-by: Suman Anna Signed-off-by: Tero Kristo

clk: ti: fix dual-registration of uart4_ick

2015-10-02T06:24:28Z

On the OMAP AM3517 platform the uart4_ick gets registered twice, causing any power management to /dev/ttyO3 to fail when trying to wake the device up. This solves the following oops: [] Unhandled fault: external abort on non-linefetch (0x1028) at 0xfa09e008 [] PC is at serial_omap_pm+0x48/0x15c [] LR is at _raw_spin_unlock_irqrestore+0x30/0x5c Fixes: aafd900cab87 ("CLK: TI: add omap3 clock init file") Cc: stable@vger.kernel.org Cc: mturquette@baylibre.com Cc: sboyd@codeaurora.org Cc: linux-clk@vger.kernel.org Cc: linux-omap@vger.kernel.org Cc: linux-kernel@lists.codethink.co.uk Signed-off-by: Ben Dooks Signed-off-by: Tero Kristo

clk: ti: clk-7xx: Remove hardwired ABE clock configuration

2015-10-02T06:24:28Z

The ABE related clocks should be configured via DT and not have it wired inside of the kernel. Fixes: a74c52def9ab ("clk: ti: clk-7xx: Correct ABE DPLL configuration") Signed-off-by: Peter Ujfalusi Signed-off-by: Tero Kristo

clk: samsung: fix cpu clock's flags checking

2015-09-22T16:53:51Z

CLK_CPU_HAS_DIV1 and CLK_CPU_NEEDS_DEBUG_ALT_DIV masks were incorrectly used as a bit numbers. Fix it. Tested on Exynos4210 based Origen board and on Exynos5250 based Arndale board. Cc: Tomasz Figa Cc: Michael Turquette Cc: Thomas Abraham Fixes: ddeac8d96 ("clk: samsung: add infrastructure to register cpu clocks") Reported-by: Dan Carpenter Reviewed-by: Krzysztof Kozlowski Reviewed-by: Javier Martinez Canillas Acked-by: Sylwester Nawrocki Signed-off-by: Bartlomiej Zolnierkiewicz Signed-off-by: Stephen Boyd

Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

2015-09-20T03:17:40Z

Pull clk fixes from Stephen Boyd: "A few driver fixes for tegra, rockchip, and st SoCs and a two-liner in the framework to avoid oops when get_parent ops return out of range values on tegra platforms" * tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x clk: check for invalid parent index of orphans in __clk_init() clk: tegra: dfll: Properly protect OPP list clk: rockchip: add critical clock for rk3368

drivers: clk: st: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x

2015-09-17T18:51:43Z

Use a generic name for this kind of PLL Correction in dts files are already done here: commit 5eb26c605909 ("ARM: STi: DT: Rename st_pll3200c32_407_c0_x into st_pll3200c32_cx_x") Signed-off-by: Gabriel Fernandez Signed-off-by: Stephen Boyd