<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/clocksource/mips-gic-timer.c, branch v4.5</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.5</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.5'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2015-11-11T07:36:41Z</updated>
<entry>
<title>MIPS: VDSO: Add implementations of gettimeofday() and clock_gettime()</title>
<updated>2015-11-11T07:36:41Z</updated>
<author>
<name>Alex Smith</name>
<email>alex.smith@imgtec.com</email>
</author>
<published>2015-10-21T08:57:44Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a7f4df4e21dd8a8dab96e88acd2c9c5017b83fc6'/>
<id>urn:sha1:a7f4df4e21dd8a8dab96e88acd2c9c5017b83fc6</id>
<content type='text'>
Add user-mode implementations of gettimeofday() and clock_gettime() to
the VDSO. This is currently usable with 2 clocksources: the CP0 count
register, which is accessible to user-mode via RDHWR on R2 and later
cores, or the MIPS Global Interrupt Controller (GIC) timer, which
provides a "user-mode visible" section containing a mirror of its
counter registers. This section must be mapped into user memory, which
is done below the VDSO data page.

When a supported clocksource is not in use, the VDSO functions will
return -ENOSYS, which causes libc to fall back on the standard syscall
path.

When support for neither of these clocksources is compiled into the
kernel at all, the VDSO still provides clock_gettime(), as the coarse
realtime/monotonic clocks can still be implemented. However,
gettimeofday() is not provided in this case as nothing can be done
without a suitable clocksource. This causes the symbol lookup to fail
in libc and it will then always use the standard syscall path.

This patch includes a workaround for a bug in QEMU which results in
RDHWR on the CP0 count register always returning a constant (incorrect)
value. A fix for this has been submitted, and the workaround can be
removed after the fix has been in stable releases for a reasonable
amount of time.

A simple performance test which calls gettimeofday() 1000 times in a
loop and calculates the average execution time gives the following
results on a Malta + I6400 (running at 20MHz):

 - Syscall:    ~31000 ns
 - VDSO (GIC): ~15000 ns
 - VDSO (CP0): ~9500 ns

[markos.chandras@imgtec.com:
- Minor code re-arrangements in order for mappings to be made
in the order they appear to the process' address space.
- Move do_{monotonic, realtime} outside of the MIPS_CLOCK_VSYSCALL ifdef
- Use gic_get_usm_range so we can do the GIC mapping in the
arch/mips/kernel/vdso instead of the GIC irqchip driver]

Signed-off-by: Alex Smith &lt;alex.smith@imgtec.com&gt;
Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/11338/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus</title>
<updated>2015-09-03T23:55:55Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-09-03T23:55:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=807249d3ada1ff28a47c4054ca4edd479421b671'/>
<id>urn:sha1:807249d3ada1ff28a47c4054ca4edd479421b671</id>
<content type='text'>
Pull MIPS updates from Ralf Baechle:
 "This is the main pull request for 4.3 for MIPS.  Here's the summary:

  Three fixes that didn't make 4.2-stable:

   - a -Os build might compile the kernel using the MIPS16 instruction
     set but the R2 optimized inline functions in &lt;uapi/asm/swab.h&gt; are
     implemented using 32-bit wide instructions which is invalid.

   - a build error in pgtable-bits.h for a particular kernel
     configuration.

   - accessing registers of the CM GCR might have been compiled to use
     64 bit accesses but these registers are onl 32 bit wide.

  And also a few new bits:

   - move the ATH79 GPIO driver to drivers/gpio

   - the definition of IRQCHIP_DECLARE has moved to linux/irqchip.h,
     change ATH79 accordingly.

   - fix definition of pgprot_writecombine

   - add an implementation of dma_map_ops.mmap

   - fix alignment of quiet build output for vmlinuz link

   - BCM47xx: Use kmemdup rather than duplicating its implementation

   - Netlogic: Fix 0x0x prefixes of constants.

   - merge Bjorn Helgaas' series to remove most of the weak keywords
     from function declarations.

   - CP0 and CP1 registers are best considered treated as unsigned
     values to avoid large values from becoming negative values.

   - improve support for the MIPS GIC timer.

   - enable common clock framework for Malta and SEAD3.

   - a number of improvments and fixes to dump_tlb().

   - document the MIPS TLB dump functionality in Magic SysRq.

   - Cavium Octeon CN68XX improvments.

   - NetLogic improvments.

   - irq: Use access helper irq_data_get_affinity_mask.

   - handle MSA unaligned accesses.

   - a number of R6-related math-emu fixes.

   - support for I6400.

   - improvments to MSA support.

   - add uprobes support.

   - move from deprecated __initcall to arch_initcall.

   - remove finish_arch_switch().

   - IRQ cleanups by Thomas Gleixner.

   - migrate to new 'set-state' interface.

   - random small cleanups"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (148 commits)
  MIPS: UAPI: Fix unrecognized opcode WSBH/DSBH/DSHD when using MIPS16.
  MIPS: Fix alignment of quiet build output for vmlinuz link
  MIPS: math-emu: Remove unused handle_dsemul function declaration
  MIPS: math-emu: Add support for the MIPS R6 MAX{, A} FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MIN{, A} FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 CLASS FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 RINT FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MSUBF FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 MADDF FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 SELNEZ FPU instruction
  MIPS: math-emu: Add support for the MIPS R6 SELEQZ FPU instruction
  MIPS: math-emu: Add support for the CMP.condn.fmt R6 instruction
  MIPS: inst.h: Add new MIPS R6 FPU opcodes
  MIPS: Octeon: Fix management port MII address on Kontron S1901
  MIPS: BCM47xx: Use kmemdup rather than duplicating its implementation
  STAGING: Octeon: Use common helpers for determining interface and port
  MIPS: Octeon: Support interfaces 4 and 5
  MIPS: Octeon: Set up 1:1 mapping between CN68XX PKO queues and ports
  MIPS: Octeon: Initialize CN68XX PKO
  STAGING: Octeon: Support CN68XX style WQE
  ...
</content>
</entry>
<entry>
<title>CLOCKSOURCE: mips-gic: Update clockevent frequency on clock rate changes</title>
<updated>2015-09-03T10:08:07Z</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@imgtec.com</email>
</author>
<published>2015-07-27T14:00:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fc6a6772f888ee8ab4c5428854f7f1d3abda13df'/>
<id>urn:sha1:fc6a6772f888ee8ab4c5428854f7f1d3abda13df</id>
<content type='text'>
This commit introduces the clockevent frequency update, using
a clock notifier. It will be used to support CPUFreq on platforms
using MIPS GIC based clockevents.

Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@imgtec.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: James Hartley &lt;James.Hartley@imgtec.com&gt;
Cc: Govindraj Raja &lt;Govindraj.Raja@imgtec.com&gt;
Cc: Damien Horsley &lt;Damien.Horsley@imgtec.com&gt;
Cc: James Hogan &lt;James.Hogan@imgtec.com&gt;
Cc: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Patchwork: https://patchwork.linux-mips.org/patch/10782/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>CLOCKSOURCE: mips-gic: Split clocksource and clockevent initialization</title>
<updated>2015-09-03T10:08:06Z</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@imgtec.com</email>
</author>
<published>2015-07-27T14:00:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=67d4e669c1e504a491e44737f3561eaba919b304'/>
<id>urn:sha1:67d4e669c1e504a491e44737f3561eaba919b304</id>
<content type='text'>
This is preparation work for the introduction of clockevent frequency
update with a clock notifier. This is only possible when the device
is passed a clk struct, so let's split the legacy and devicetree
initialization.

Reviewed-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@imgtec.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: James Hartley &lt;James.Hartley@imgtec.com&gt;
Cc: Govindraj Raja &lt;Govindraj.Raja@imgtec.com&gt;
Cc: Damien Horsley &lt;Damien.Horsley@imgtec.com&gt;
Cc: James Hogan &lt;James.Hogan@imgtec.com&gt;
Cc: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Patchwork: https://patchwork.linux-mips.org/patch/10781/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>CLOCKSOURCE: mips-gic: Add missing error returns checks</title>
<updated>2015-09-03T10:08:06Z</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@imgtec.com</email>
</author>
<published>2015-07-27T14:00:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f95ac8558b88a5e9ae2b1d580a5cc55bffa512fa'/>
<id>urn:sha1:f95ac8558b88a5e9ae2b1d580a5cc55bffa512fa</id>
<content type='text'>
This commit adds the required checks on the functions that return
an error. Some of them are not critical, so only a warning is
printed.

Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@imgtec.com&gt;
Reviewed-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: James Hartley &lt;James.Hartley@imgtec.com&gt;
Cc: Govindraj Raja &lt;Govindraj.Raja@imgtec.com&gt;
Cc: Damien Horsley &lt;Damien.Horsley@imgtec.com&gt;
Cc: James Hogan &lt;James.Hogan@imgtec.com&gt;
Cc: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Patchwork: https://patchwork.linux-mips.org/patch/10780/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>CLOCKSOURCE: mips-gic: Enable the clock before using it</title>
<updated>2015-09-03T10:08:05Z</updated>
<author>
<name>Ezequiel Garcia</name>
<email>ezequiel.garcia@imgtec.com</email>
</author>
<published>2015-07-27T14:00:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=eb811c73b69f18cefb7a63f22fe07212c6575650'/>
<id>urn:sha1:eb811c73b69f18cefb7a63f22fe07212c6575650</id>
<content type='text'>
For the clock to be used (e.g. get its rate through clk_get_rate)
it should be prepared and enabled first.

Also, while the clock is enabled the driver must hold a reference to it,
so let's remove the call to clk_put.

Reviewed-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Signed-off-by: Ezequiel Garcia &lt;ezequiel.garcia@imgtec.com&gt;
Acked-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: James Hartley &lt;James.Hartley@imgtec.com&gt;
Cc: Govindraj Raja &lt;Govindraj.Raja@imgtec.com&gt;
Cc: Damien Horsley &lt;Damien.Horsley@imgtec.com&gt;
Cc: James Hogan &lt;James.Hogan@imgtec.com&gt;
Cc: Ezequiel Garcia &lt;ezequiel@vanguardiasur.com.ar&gt;
Patchwork: https://patchwork.linux-mips.org/patch/10779/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>clockevents/drivers/mips-gic: Migrate to new 'set-state' interface</title>
<updated>2015-08-10T09:40:32Z</updated>
<author>
<name>Viresh Kumar</name>
<email>viresh.kumar@linaro.org</email>
</author>
<published>2015-06-18T10:54:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d47409347e76ca5e7cdbbb515a9000878b5222cc'/>
<id>urn:sha1:d47409347e76ca5e7cdbbb515a9000878b5222cc</id>
<content type='text'>
Migrate mips-gic driver to the new 'set-state' interface provided by
clockevents core, the earlier 'set-mode' interface is marked obsolete
now.

This also enables us to implement callbacks for new states of clockevent
devices, for example: ONESHOT_STOPPED.

We weren't doing anything in the -&gt;set_mode() callback. So, this patch
doesn't provide any set-state callbacks.

Cc: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: Steven J. Hill &lt;Steven.Hill@imgtec.com&gt;
Signed-off-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>CLOCKSOURCE: mips-gic: Allow GIC clock to be specified in device-tree</title>
<updated>2015-04-01T15:22:11Z</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2015-02-24T02:28:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5b4e845393d313af1d319b8bd01c9daaca3aa487'/>
<id>urn:sha1:5b4e845393d313af1d319b8bd01c9daaca3aa487</id>
<content type='text'>
As an alternative to the "clock-frequency" property, allow the GIC
timer operating clock to be specified in the device-tree instead.
This is useful on systems which use common clock or where the GIC
is not fixed to a particular frequency and is instead, for example,
derived from the CPU clock.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Cc: Kumar Gala &lt;galak@codeaurora.org&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/9309/
</content>
</entry>
<entry>
<title>CLOCKSOURCE: mips-gic-timer: Ensure GIC counter is running</title>
<updated>2015-03-31T10:04:13Z</updated>
<author>
<name>Markos Chandras</name>
<email>markos.chandras@imgtec.com</email>
</author>
<published>2015-03-23T12:32:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7d9cd1f5189abaa9553ddcb966b749c65b669d5a'/>
<id>urn:sha1:7d9cd1f5189abaa9553ddcb966b749c65b669d5a</id>
<content type='text'>
Start the GIC counter after configuring the clocksource since there
are no guarantees the counter will be running after a CPU reset.

Signed-off-by: Markos Chandras &lt;markos.chandras@imgtec.com&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: linux-kernel@vger.kernel.org
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/9595/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
<entry>
<title>clocksource: mips-gic: Add device-tree support</title>
<updated>2014-11-24T06:45:30Z</updated>
<author>
<name>Andrew Bresticker</name>
<email>abrestic@chromium.org</email>
</author>
<published>2014-11-12T19:43:39Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=e12aa828ff42bae894e4eb7350d4dbf46eb19084'/>
<id>urn:sha1:e12aa828ff42bae894e4eb7350d4dbf46eb19084</id>
<content type='text'>
Parse the GIC timer frequency and interrupt from the device-tree.

Signed-off-by: Andrew Bresticker &lt;abrestic@chromium.org&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Pawel Moll &lt;pawel.moll@arm.com&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Ian Campbell &lt;ijc+devicetree@hellion.org.uk&gt;
Cc: Kumar Gala &lt;galak@codeaurora.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Jason Cooper &lt;jason@lakedaemon.net&gt;
Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Cc: John Crispin &lt;blogic@openwrt.org&gt;
Cc: David Daney &lt;ddaney.cavm@gmail.com&gt;
Cc: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: James Hogan &lt;james.hogan@imgtec.com&gt;
Cc: linux-mips@linux-mips.org
Cc: devicetree@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/8421/
Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
</content>
</entry>
</feed>
