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<title>linux/drivers/clocksource/riscv_timer.c, branch v4.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2018-08-13T15:31:31Z</updated>
<entry>
<title>clocksource: new RISC-V SBI timer driver</title>
<updated>2018-08-13T15:31:31Z</updated>
<author>
<name>Palmer Dabbelt</name>
<email>palmer@dabbelt.com</email>
</author>
<published>2018-08-04T08:23:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=62b0194368147def8c5a77ce604a125d620fc582'/>
<id>urn:sha1:62b0194368147def8c5a77ce604a125d620fc582</id>
<content type='text'>
The RISC-V ISA defines a per-hart real-time clock and timer, which is
present on all systems.  The clock is accessed via the 'rdtime'
pseudo-instruction (which reads a CSR), and the timer is set via an SBI
call.

Contains various improvements from Atish Patra &lt;atish.patra@wdc.com&gt;.

Signed-off-by: Dmitriy Cherkasov &lt;dmitriy@oss-tech.org&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@dabbelt.com&gt;
[hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(),
 minor cleanups, merged  hotplug cpu support and other improvements
 from Atish]
Signed-off-by: Christoph Hellwig &lt;hch@lst.de&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Atish Patra &lt;atish.patra@wdc.com&gt;
Signed-off-by: Palmer Dabbelt &lt;palmer@sifive.com&gt;
</content>
</entry>
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