linux/drivers/clocksource/riscv_timer.c, branch v4.20

RISC-V: Use Linux logical CPU number instead of hartid

2018-10-23T00:03:37Z

Setup the cpu_logical_map during boot. Moreover, every SBI call and PLIC context are based on the physical hartid. Use the logical CPU to hartid mapping to pass correct hartid to respective functions. Signed-off-by: Atish Patra Reviewed-by: Anup Patel Reviewed-by: Christoph Hellwig Signed-off-by: Palmer Dabbelt

RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartid

2018-10-23T00:03:36Z

It's a bit confusing exactly what this function does: it actually returns the hartid of an OF processor node, failing with -1 on invalid nodes. I've changed the name to _hartid() in order to make that a bit more clear, as well as adding a comment. Signed-off-by: Palmer Dabbelt [Atish: code comment formatting update] Signed-off-by: Atish Patra Reviewed-by: Christoph Hellwig Signed-off-by: Palmer Dabbelt

clocksource: new RISC-V SBI timer driver

2018-08-13T15:31:31Z

The RISC-V ISA defines a per-hart real-time clock and timer, which is present on all systems. The clock is accessed via the 'rdtime' pseudo-instruction (which reads a CSR), and the timer is set via an SBI call. Contains various improvements from Atish Patra . Signed-off-by: Dmitriy Cherkasov Signed-off-by: Palmer Dabbelt [hch: remove dead code, add SPDX tags, used riscv_of_processor_hart(), minor cleanups, merged hotplug cpu support and other improvements from Atish] Signed-off-by: Christoph Hellwig Acked-by: Thomas Gleixner Reviewed-by: Atish Patra Signed-off-by: Palmer Dabbelt