<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/clocksource/sun4i_timer.c, branch v3.16</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v3.16</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v3.16'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2014-03-11T22:04:46Z</updated>
<entry>
<title>clocksource: sunxi: Add new compatibles</title>
<updated>2014-03-11T22:04:46Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2014-02-06T09:40:31Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ec6c085cc779ae863d363e7d076b763a2a0aca4c'/>
<id>urn:sha1:ec6c085cc779ae863d363e7d076b763a2a0aca4c</id>
<content type='text'>
The Allwinner A10 compatibles were following a slightly different compatible
patterns than the rest of the SoCs for historical reasons. Add compatibles
matching the other pattern to the timer driver for consistency, and keep the
older one for backward compatibility.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'clockevents/3.14' of git://git.linaro.org/people/daniel.lezcano/linux into timers/core</title>
<updated>2014-01-14T13:33:29Z</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2014-01-12T16:28:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1b3f82876006bd4172ca7696aa367baf96ec7c15'/>
<id>urn:sha1:1b3f82876006bd4172ca7696aa367baf96ec7c15</id>
<content type='text'>
Pull clocksource/clockevent updates from Daniel Lezcano:

  * Axel Lin removed an unused structure defining the ids for the
    bcm kona driver.

  * Ezequiel Garcia enabled the timer divider only when the 25MHz
    timer is not used for the armada 370 XP.

  * Jingoo Han removed a pointless platform data initialization for
    the sh_mtu and sh_mtu2.

  * Laurent Pinchart added the clk_prepare/clk_unprepare for sh_cmt.

  * Linus Walleij added a useful warning in clk_of when no clocks
    are found while the old behavior was to silently hang at boot time.

  * Maxime Ripard added the high speed timer drivers for the
    Allwinner SoCs (A10, A13, A20). He increased the rating, shared the
    irq across all available cpus and fixed the clockevent's irq
    initialization for the sun4i.

  * Michael Opdenacker removed the usage of the IRQF_DISABLED for the
    all the timers driver located in drivers/clocksource.

  * Stephen Boyd switched to sched_clock_register for the
    arm_global_timer, cadence_ttc, sun4i and orion timers.

Conflicts:
	drivers/clocksource/clksrc-of.c

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>clocksource: sun4i: Switch to sched_clock_register()</title>
<updated>2013-12-11T10:40:24Z</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2013-11-19T23:47:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=662e7230ee16951e6858c01e72db87c5dc46150e'/>
<id>urn:sha1:662e7230ee16951e6858c01e72db87c5dc46150e</id>
<content type='text'>
The 32 bit sched_clock interface now supports 64 bits. Upgrade to
the 64 bit function to allow us to remove the 32 bit registration
interface. While we're here, mark the sched_clock function as
notrace to prevent ftrace recursion crashes.

Cc: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>clocksource: sun4i: Increase a bit the clock event and sources rating</title>
<updated>2013-12-11T10:07:31Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-11-07T11:01:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5df9affb50a09e0cb571c4fa3e2d577db85c7475'/>
<id>urn:sha1:5df9affb50a09e0cb571c4fa3e2d577db85c7475</id>
<content type='text'>
We want to keep this driver as the default provider of the clock events
and source, yet some other driver might fit in the "desired" category of
ratings. Hence, we need to increase a bit the rating so that we can have
more flexibility in the ratings we choose.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Tested-by: Emilio López &lt;emilio@elopez.com.ar&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>clocksource: sun4i: Change CPU mask to cpu_possible_mask</title>
<updated>2013-12-11T10:07:30Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-10-25T11:16:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2c28f32ca4c98b41ad95f62fa27f59f3117931d4'/>
<id>urn:sha1:2c28f32ca4c98b41ad95f62fa27f59f3117931d4</id>
<content type='text'>
The interrupt for the timer is a shared processor interrupt, so any CPU
found in the system can handle it. Switch to our cpumask to
cpu_possible_mask instead of cpumask_of(0).

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clockevent: sun4i: Fill the irq field in the clockevent structure</title>
<updated>2013-12-11T10:07:29Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-10-25T11:16:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=247f325aaddb8b6117959f70c26ba735360c4160'/>
<id>urn:sha1:247f325aaddb8b6117959f70c26ba735360c4160</id>
<content type='text'>
The clock event structure irq field was not filled previously to the
interrupt we're using.

This was resulting in the timer not being used at all when using a
configuration with SMP enabled on a system with several CPUs, and with
the cpumask set to the cpu_possible_mask.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clocksource: sunxi: Stop timer from ticking before enabling interrupts</title>
<updated>2013-12-10T18:41:28Z</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2013-12-02T09:29:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6db50bb67598668c525f12e2f7191f5d03ca46f2'/>
<id>urn:sha1:6db50bb67598668c525f12e2f7191f5d03ca46f2</id>
<content type='text'>
The sun4i timer can still be ticking when we enable the interrupt.
If another timer is actually used (A7 architected timer, for example),
odds are that the interrupt will eventually fire with the event_handler
pointer being NULL.

The obvious fix it to stop the timer before registering the interrupt.

Observed and tested on sun7i (cubietruck).

Cc: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>clocksource: sun4i: remove IRQF_DISABLED</title>
<updated>2013-10-22T20:36:50Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-10-14T19:07:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3353652ce0eb22854b1748b8320c2b81912953a1'/>
<id>urn:sha1:3353652ce0eb22854b1748b8320c2b81912953a1</id>
<content type='text'>
IRQF_DISABLED is a no-op nowadays, so we can safely remove it.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>clocksource: sun4i: Report the minimum tick that we can program</title>
<updated>2013-10-22T20:36:43Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-10-14T19:07:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=12e1480bcb4920c1b02b3793cb48756497919a60'/>
<id>urn:sha1:12e1480bcb4920c1b02b3793cb48756497919a60</id>
<content type='text'>
We need to wait for at least 2 clock cycles whenever we reprogram our
clockevent timer. Report that the minimum number of ticks we can handle
is 3 ticks, and remove 3 ticks to the interval programmed to reflect
this.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
<entry>
<title>clocksource: sun4i: Fix bug when switching from periodic to oneshot modes</title>
<updated>2013-07-18T13:27:21Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2013-07-16T14:45:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7e14183469d8aa2c7aa7675a6156e7846dda7748'/>
<id>urn:sha1:7e14183469d8aa2c7aa7675a6156e7846dda7748</id>
<content type='text'>
The interval was firing at was set up at probe time, and only changed in
the set_next_event, and never changed back, which is not really what is
expected.

When enabling the periodic mode, now set an interval to tick every
jiffy.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Daniel Lezcano &lt;daniel.lezcano@linaro.org&gt;
</content>
</entry>
</feed>
