linux/drivers/clocksource/timer-riscv.c, branch v5.1

clocksource/drivers/riscv: Fix clocksource mask

2019-03-23T11:25:34Z

For all riscv architectures (RV32, RV64 and RV128), the clocksource is a 64 bit incrementing counter. Fix the clock source mask accordingly. Tested on both 64bit and 32 bit virt machine in QEMU. Fixes: 62b019436814 ("clocksource: new RISC-V SBI timer driver") Signed-off-by: Atish Patra Signed-off-by: Thomas Gleixner Reviewed-by: Anup Patel Cc: Albert Ou Cc: Daniel Lezcano Cc: linux-riscv@lists.infradead.org Cc: Palmer Dabbelt Cc: Anup Patel Cc: Damien Le Moal Cc: stable@vger.kernel.org Link: https://lkml.kernel.org/r/20190322215411.19362-1-atish.patra@wdc.com

clocksource/drivers/riscv: Add required checks during clock source init

2019-02-23T11:13:45Z

Currently, clocksource registration happens for an invalid cpu for non-smp kernels. This lead to kernel panic as cpu hotplug registration will fail for those cpus. Moreover, riscv_hartid_to_cpuid can return errors now. Do not proceed if hartid or cpuid is invalid. Take this opportunity to print appropriate error strings for different failure cases. Signed-off-by: Atish Patra Reviewed-by: Anup Patel Reviewed-by: Palmer Dabbelt Signed-off-by: Daniel Lezcano

clocksource/drivers/riscv: Change name riscv_timer to timer-riscv

2018-12-18T21:22:23Z

In order to unify the names in this directory, let's rename the driver to be prefixed with timer-* Reviewed-by: Palmer Dabbelt Signed-off-by: Daniel Lezcano