<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/dma, branch v2.6.37</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v2.6.37</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v2.6.37'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2011-01-03T19:48:54Z</updated>
<entry>
<title>Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx</title>
<updated>2011-01-03T19:48:54Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2011-01-03T19:48:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d45fa563a62c908d0e9a581d4f091fed6371ebd0'/>
<id>urn:sha1:d45fa563a62c908d0e9a581d4f091fed6371ebd0</id>
<content type='text'>
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
  dmaengine: provide dummy functions for DMA_ENGINE=n
  mv_xor: fix race in tasklet function
</content>
</entry>
<entry>
<title>mv_xor: fix race in tasklet function</title>
<updated>2011-01-03T09:39:26Z</updated>
<author>
<name>Saeed Bishara</name>
<email>saeed@marvell.com</email>
</author>
<published>2010-12-21T14:53:39Z</published>
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<id>urn:sha1:8333f65ef094e47020cd01452b4637e7daf5a77f</id>
<content type='text'>
use mv_xor_slot_cleanup() instead of __mv_xor_slot_cleanup() as the former function
aquires the spin lock that needed to protect the drivers data.

Cc: &lt;stable@kernel.org&gt;
Signed-off-by: Saeed Bishara &lt;saeed@marvell.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx</title>
<updated>2010-12-14T21:35:47Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2010-12-14T21:35:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5d43a1de26f37080b75d7c0cf2a0b97523457568'/>
<id>urn:sha1:5d43a1de26f37080b75d7c0cf2a0b97523457568</id>
<content type='text'>
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx:
  dmaengine: at_hdmac: fix buffer transfer size specification
  fsldma: fix issue of slow dma
  dmaengine i.MX SDMA: initialize on module_init
  dma : EG20T PCH: Fix miss-setting DMA descriptor
  intel_mid_dma: fix section mismatch warnings
  dmaengine: imx-sdma: fix bug in buffer descriptor initialization
  drivers/dma/ppc4xx: Use printf extension %pR for struct resource
  drivers/dma/ioat: Use the ccflag-y instead of EXTRA_CFLAGS
  drivers/dma/: Use the ccflag-y instead of EXTRA_CFLAGS
  dma: intel_mid_dma: fix double free on mid_setup_dma error path
  dma: imx-dma: fix imxdma_probe error path
</content>
</entry>
<entry>
<title>dmaengine: at_hdmac: fix buffer transfer size specification</title>
<updated>2010-12-14T08:39:29Z</updated>
<author>
<name>Nicolas Ferre</name>
<email>nicolas.ferre@atmel.com</email>
</author>
<published>2010-12-13T12:48:41Z</published>
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<id>urn:sha1:59a609d9b59be9452f168fe228befea53d5962ff</id>
<content type='text'>
Buffer transfer size is the number of transfers to be performed in
relation with the width of the _source_ interface.
So in the DMA_FROM_DEVICE case, it should be the register width that
should be taken into account.

Signed-off-by: Nicolas Ferre &lt;nicolas.ferre@atmel.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>fsldma: fix issue of slow dma</title>
<updated>2010-12-13T22:05:27Z</updated>
<author>
<name>Forrest Shi</name>
<email>b29237@freescale.com</email>
</author>
<published>2010-12-09T08:14:04Z</published>
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<id>urn:sha1:f3c677b997757326e1f29d33060719a6a5091950</id>
<content type='text'>
Fixed fsl dma slow issue by initializing dma mode register with
bandwidth control. It boosts dma performance and should works
with 85xx board.

Signed-off-by: Forrest Shi &lt;b29237@freescale.com&gt;
Signed-off-by: Li Yang &lt;leoli@freescale.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>dmaengine i.MX SDMA: initialize on module_init</title>
<updated>2010-12-07T23:38:07Z</updated>
<author>
<name>Sascha Hauer</name>
<email>s.hauer@pengutronix.de</email>
</author>
<published>2010-12-06T10:09:57Z</published>
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<id>urn:sha1:c989a7fc139ec8975fdc230e2de42f3c4555880e</id>
<content type='text'>
The firmware framework gets initialized during fs_initcall time, so
we are not allowed to call request_firmware earlier.

Signed-off-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>dma : EG20T PCH: Fix miss-setting DMA descriptor</title>
<updated>2010-12-07T23:07:08Z</updated>
<author>
<name>Tomoya MORINAGA</name>
<email>tomoya-linux@dsn.okisemi.com</email>
</author>
<published>2010-12-01T10:49:48Z</published>
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<id>urn:sha1:943d8d8bca431d6c93f17bf38f4b09c65e0a81d7</id>
<content type='text'>
Currently, in case of using scatter/gather mode, head of data is not sent to

destination. The cause is second descriptor address is set to NEXT.

The NEXT must have head of descriptor address.

This patch sets head of descriptor address to the NEXT.

Acked-by: Yong Wang &lt;youg.y.wang@intel.com&gt;
Signed-off-by: Tomoya MORINAGA &lt;tomoya-linux@dsn.okisemi.com&gt;
[dan.j.williams@intel.com: fixed up usage of virt_to_phys()]
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>intel_mid_dma: fix section mismatch warnings</title>
<updated>2010-12-04T23:03:56Z</updated>
<author>
<name>Dan Williams</name>
<email>dan.j.williams@intel.com</email>
</author>
<published>2010-12-04T22:53:32Z</published>
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<id>urn:sha1:cf2f9c59807f173b1c6a537fde7c83c8da876e56</id>
<content type='text'>
Rename intel_mid_dma_pci to intel_mid_dma_pci_driver to pick up the
applied annotations of that suffix.

Reported-by: &lt;major_Lee@wistron.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>dmaengine: imx-sdma: fix bug in buffer descriptor initialization</title>
<updated>2010-12-04T23:03:46Z</updated>
<author>
<name>Anatolij Gustschin</name>
<email>agust@denx.de</email>
</author>
<published>2010-11-22T17:35:18Z</published>
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<id>urn:sha1:d2f5c276ea4b7b7e1b953926bac9d0b148fcce4e</id>
<content type='text'>
Currently while submitting scatterlists with more than one SG
entry the DMA buffer address from the first SG entry is inserted
into all initialized DMA buffer descriptors. This is due to the
typo in the for_each_sg() loop where the scatterlist pointer is
used for obtaining the DMA buffer address and _not_ the SG list
iterator.

As a result all received data will be written only into the first
DMA buffer while reading. While writing the data from the first
DMA buffer is send to the device multiple times. This caused
the filesystem destruction on the MMC card when using DMA in
mxcmmc driver.

Signed-off-by: Anatolij Gustschin &lt;agust@denx.de&gt;
Acked-by: Sascha Hauer &lt;s.hauer@pengutronix.de&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
<entry>
<title>drivers/dma/ppc4xx: Use printf extension %pR for struct resource</title>
<updated>2010-12-04T23:03:40Z</updated>
<author>
<name>Joe Perches</name>
<email>joe@perches.com</email>
</author>
<published>2010-11-12T21:37:54Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a584bff5efae8c1d026e3a930e3d13a90264fafc'/>
<id>urn:sha1:a584bff5efae8c1d026e3a930e3d13a90264fafc</id>
<content type='text'>
Using %pR standardizes the struct resource output.

Signed-off-by: Joe Perches &lt;joe@perches.com&gt;
Signed-off-by: Dan Williams &lt;dan.j.williams@intel.com&gt;
</content>
</entry>
</feed>
