<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/dma, branch v5.12</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.12</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.12'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-04-12T16:38:39Z</updated>
<entry>
<title>dmaengine: idxd: fix wq cleanup of WQCFG registers</title>
<updated>2021-04-12T16:38:39Z</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2021-04-12T16:02:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ea9aadc06a9f10ad20a90edc0a484f1147d88a7a'/>
<id>urn:sha1:ea9aadc06a9f10ad20a90edc0a484f1147d88a7a</id>
<content type='text'>
A pre-release silicon erratum workaround where wq reset does not clear
WQCFG registers was leaked into upstream code. Use wq reset command
instead of blasting the MMIO region. This also address an issue where
we clobber registers in future devices.

Fixes: da32b28c95a7 ("dmaengine: idxd: cleanup workqueue config after disabling")
Reported-by: Shreenivaas Devarajan &lt;shreenivaas.devarajan@intel.com&gt;
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://lore.kernel.org/r/161824330020.881560.16375921906426627033.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: idxd: clear MSIX permission entry on shutdown</title>
<updated>2021-04-12T16:38:38Z</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2021-04-12T16:23:27Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6df0e6c57dfc064af330071f372f11aa8c584997'/>
<id>urn:sha1:6df0e6c57dfc064af330071f372f11aa8c584997</id>
<content type='text'>
Add disabling/clearing of MSIX permission entries on device shutdown to
mirror the enabling of the MSIX entries on probe. Current code left the
MSIX enabled and the pasid entries still programmed at device shutdown.

Fixes: 8e50d392652f ("dmaengine: idxd: Add shared workqueue support")
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://lore.kernel.org/r/161824457969.882533.6020239898682672311.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: plx_dma: add a missing put_device() on error path</title>
<updated>2021-04-12T09:43:51Z</updated>
<author>
<name>Dan Carpenter</name>
<email>dan.carpenter@oracle.com</email>
</author>
<published>2021-03-23T13:19:59Z</published>
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<id>urn:sha1:07503e6aefe4a6efd777062191944a14f03b3a18</id>
<content type='text'>
Add a missing put_device(&amp;pdev-&gt;dev) if the call to
dma_async_device_register(dma); fails.

Fixes: 905ca51e63be ("dmaengine: plx-dma: Introduce PLX DMA engine PCI driver skeleton")
Signed-off-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Reviewed-by: Logan Gunthorpe &lt;logang@deltatee.com&gt;
Link: https://lore.kernel.org/r/YFnq/0IQzixtAbC1@mwanda
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: tegra20: Fix runtime PM imbalance on error</title>
<updated>2021-04-12T09:40:44Z</updated>
<author>
<name>Dinghao Liu</name>
<email>dinghao.liu@zju.edu.cn</email>
</author>
<published>2021-04-09T08:28:05Z</published>
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<id>urn:sha1:917a3200b9f467a154999c7572af345f2470aaf4</id>
<content type='text'>
pm_runtime_get_sync() will increase the runtime PM counter
even it returns an error. Thus a pairing decrement is needed
to prevent refcount leak. Fix this by replacing this API with
pm_runtime_resume_and_get(), which will not change the runtime
PM counter on error.

Signed-off-by: Dinghao Liu &lt;dinghao.liu@zju.edu.cn&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Link: https://lore.kernel.org/r/20210409082805.23643-1-dinghao.liu@zju.edu.cn
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: Fix a double free in dma_async_device_register</title>
<updated>2021-04-12T09:35:58Z</updated>
<author>
<name>Lv Yunlong</name>
<email>lyl2019@mail.ustc.edu.cn</email>
</author>
<published>2021-03-31T01:44:58Z</published>
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<id>urn:sha1:ea45b6008f8095db0cc09ad6e03c7785c2986197</id>
<content type='text'>
In the first list_for_each_entry() macro of dma_async_device_register,
it gets the chan from list and calls __dma_async_device_channel_register
(..,chan). We can see that chan-&gt;local is allocated by alloc_percpu() and
it is freed chan-&gt;local by free_percpu(chan-&gt;local) when
__dma_async_device_channel_register() failed.

But after __dma_async_device_channel_register() failed, the caller will
goto err_out and freed the chan-&gt;local in the second time by free_percpu().

The cause of this problem is forget to set chan-&gt;local to NULL when
chan-&gt;local was freed in __dma_async_device_channel_register(). My
patch sets chan-&gt;local to NULL when the callee failed to avoid double free.

Fixes: d2fb0a0438384 ("dmaengine: break out channel registration")
Signed-off-by: Lv Yunlong &lt;lyl2019@mail.ustc.edu.cn&gt;
Reviewed-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://lore.kernel.org/r/20210331014458.3944-1-lyl2019@mail.ustc.edu.cn
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: dw: Make it dependent to HAS_IOMEM</title>
<updated>2021-04-12T09:24:45Z</updated>
<author>
<name>Andy Shevchenko</name>
<email>andriy.shevchenko@linux.intel.com</email>
</author>
<published>2021-03-24T14:17:57Z</published>
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<id>urn:sha1:88cd1d6191b13689094310c2405394e4ce36d061</id>
<content type='text'>
Some architectures do not provide devm_*() APIs. Hence make the driver
dependent on HAVE_IOMEM.

Fixes: dbde5c2934d1 ("dw_dmac: use devm_* functions to simplify code")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Acked-by: Viresh Kumar &lt;viresh.kumar@linaro.org&gt;
Link: https://lore.kernel.org/r/20210324141757.24710-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: idxd: fix wq size store permission state</title>
<updated>2021-04-12T09:15:50Z</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2021-04-07T19:59:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0fff71c5a311e1264988179f7dcc217fda15fadd'/>
<id>urn:sha1:0fff71c5a311e1264988179f7dcc217fda15fadd</id>
<content type='text'>
WQ size can only be changed when the device is disabled. Current code
allows change when device is enabled but wq is disabled. Change the check
to detect device state.

Fixes: c52ca478233c ("dmaengine: idxd: add configuration component of driver")
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://lore.kernel.org/r/161782558755.107710.18138252584838406025.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: idxd: fix opcap sysfs attribute output</title>
<updated>2021-04-12T07:56:03Z</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2021-03-22T23:37:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ea6a5735d2a61b938a302eb3629272342a9e7c46'/>
<id>urn:sha1:ea6a5735d2a61b938a302eb3629272342a9e7c46</id>
<content type='text'>
The operation capability register is 256bits. The current output only
prints out the first 64bits. Fix to output the entire 256bits. The current
code omits operation caps from IAX devices.

Fixes: c52ca478233c ("dmaengine: idxd: add configuration component of driver")
Reported-by: Lucas Van &lt;lucas.van@intel.com&gt;
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://lore.kernel.org/r/161645624963.2003736.829798666998490151.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: idxd: Fix clobbering of SWERR overflow bit on writeback</title>
<updated>2021-04-12T07:56:03Z</updated>
<author>
<name>Dave Jiang</name>
<email>dave.jiang@intel.com</email>
</author>
<published>2021-02-17T00:13:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ea941ac294d75d0ace50797aebf0056f6f8f7a7f'/>
<id>urn:sha1:ea941ac294d75d0ace50797aebf0056f6f8f7a7f</id>
<content type='text'>
Current code blindly writes over the SWERR and the OVERFLOW bits. Write
back the bits actually read instead so the driver avoids clobbering the
OVERFLOW bit that comes after the register is read.

Fixes: bfe1d56091c1 ("dmaengine: idxd: Init and probe for Intel data accelerators")
Reported-by: Sanjay Kumar &lt;sanjay.k.kumar@intel.com&gt;
Signed-off-by: Dave Jiang &lt;dave.jiang@intel.com&gt;
Link: https://lore.kernel.org/r/161352082229.3511254.1002151220537623503.stgit@djiang5-desk3.ch.intel.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
<entry>
<title>dmaengine: xilinx: dpdma: Fix race condition in done IRQ</title>
<updated>2021-03-16T10:45:06Z</updated>
<author>
<name>Laurent Pinchart</name>
<email>laurent.pinchart@ideasonboard.com</email>
</author>
<published>2021-03-07T04:06:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=868833fbffbe51c487df4f95d4de9194264a4b30'/>
<id>urn:sha1:868833fbffbe51c487df4f95d4de9194264a4b30</id>
<content type='text'>
The active descriptor pointer is accessed from different contexts,
including different interrupt handlers, and its access must be protected
by the channel's lock. This wasn't done in the done IRQ handler. Fix it.

Signed-off-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Link: https://lore.kernel.org/r/20210307040629.29308-3-laurent.pinchart@ideasonboard.com
Signed-off-by: Vinod Koul &lt;vkoul@kernel.org&gt;
</content>
</entry>
</feed>
