<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/edac/Makefile, branch v4.5</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.5</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.5'/>
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<updated>2015-12-11T15:56:43Z</updated>
<entry>
<title>EDAC: Rework workqueue handling</title>
<updated>2015-12-11T15:56:43Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2015-11-30T18:02:01Z</published>
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<id>urn:sha1:c4cf3b454ecaa222aad9017932bd3b9c9325d931</id>
<content type='text'>
Hide the EDAC workqueue pointer in a separate compilation unit and add
accessors for the workqueue manipulations needed.

Remove edac_pci_reset_delay_period() which wasn't used by anything. It
seems it got added without a user with

  91b99041c1d5 ("drivers/edac: updated PCI monitoring")

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>EDAC: Carve out debugfs functionality</title>
<updated>2015-09-22T10:29:46Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2015-09-22T09:56:04Z</published>
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<id>urn:sha1:7ac8bf9bc9ba82aea763ef30671a34c6a2a39922</id>
<content type='text'>
... into a separate compilation unit and drop a couple of
CONFIG_EDAC_DEBUG ifdefferies. Rename edac_create_debug_nodes() to
edac_create_debugfs_nodes(), while at it.

No functionality change.

Cc: &lt;linux-edac@vger.kernel.org&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>x86/ras: Move AMD MCE injector to arch/x86/ras/</title>
<updated>2015-08-13T08:12:54Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2015-08-12T16:29:45Z</published>
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<id>urn:sha1:6c36dfe949187dc2729abfad4b083758ac5c2e0e</id>
<content type='text'>
This is an x86-specific module and would benefit from being
closer to the arch code. Move it there. Update copyright while
at it.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Link: http://lkml.kernel.org/r/1439396985-12812-14-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>EDAC: Add APM X-Gene SoC EDAC driver</title>
<updated>2015-05-29T09:39:24Z</updated>
<author>
<name>Loc Ho</name>
<email>lho@apm.com</email>
</author>
<published>2015-05-22T23:32:59Z</published>
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<id>urn:sha1:0d4429301c4aa4028b0b96bf492ddb03e13206e3</id>
<content type='text'>
Add support for the APM X-Gene SoC EDAC driver.

Signed-off-by: Loc Ho &lt;lho@apm.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Cc: devicetree@vger.kernel.org
Cc: dougthompson@xmission.com
Cc: ijc+devicetree@hellion.org.uk
Cc: jcm@redhat.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: mark.rutland@arm.com
Cc: mchehab@osg.samsung.com
Cc: patches@apm.com
Cc: robh+dt@kernel.org
Link: http://lkml.kernel.org/r/1432337580-3750-5-git-send-email-lho@apm.com
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>EDAC, synps: Add EDAC support for zynq ddr ecc controller</title>
<updated>2015-01-07T10:42:05Z</updated>
<author>
<name>Punnaiah Choudary Kalluri</name>
<email>punnaiah.choudary.kalluri@xilinx.com</email>
</author>
<published>2015-01-06T17:43:47Z</published>
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<id>urn:sha1:ae9b56e3996dadbb59c727018f45486c06844261</id>
<content type='text'>
Add EDAC support for ecc errors reporting on the synopsys ddr
controller. The ddr ecc controller corrects single bit errors and
detects double bit errors.

Selected important-ish notes from the changelog:

- I have not taken care of spliting synps_edac_geterror_info function as
it adds additional indentation levels and moreover the existing changes
were made as part of the v2 review comments

- Removed dt binding info as already there is a binding info available
under memorycontroller. so, updated ecc info there.

- Shortened the prefix "sysnopsys" to "synps"

Signed-off-by: Punnaiah Choudary Kalluri &lt;punnaia@xilinx.com&gt;
Link: http://lkml.kernel.org/r/a728a8d4678f4dbf9de189a480297c3d@BY2FFO11FD034.protection.gbl
[ Boris: massage commit message. ]
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>EDAC, pci_sysfs: remove unneccessary ifdef around entire file</title>
<updated>2014-11-11T17:17:57Z</updated>
<author>
<name>Andreas Ruprecht</name>
<email>rupran@einserver.de</email>
</author>
<published>2014-08-10T19:10:03Z</published>
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<id>urn:sha1:19ca5a3cc425cc9a8abedb0f4fb7b4e7ceee2255</id>
<content type='text'>
The file edac_pci_sysfs.c is dependent on CONFIG_PCI. This is already
modelled in the Makefile, but edac_pci_sysfs.o is still contained in
the list of files compiled even without CONFIG_PCI.

This change removes edac_pci_sysfs.o from the list of built objects
when not having CONFIG_PCI enabled and removes the then-unnecessary
ifdef from the source file.

Signed-off-by: Andreas Ruprecht &lt;rupran@einserver.de&gt;
Link: http://lkml.kernel.org/r/1407697803-3837-1-git-send-email-rupran@einserver.de
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>edac: altera: Add Altera SDRAM EDAC support</title>
<updated>2014-09-04T18:41:46Z</updated>
<author>
<name>Thor Thayer</name>
<email>tthayer@opensource.altera.com</email>
</author>
<published>2014-09-03T15:27:54Z</published>
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<id>urn:sha1:71bcada88b0f3c7f11fa5b8a4b30ae66dbfabbf3</id>
<content type='text'>
This patch adds support for the CycloneV and ArriaV SDRAM controllers.
Correction and reporting of SBEs, Panic on DBEs.

There was a discussion thread on whether this driver should be an mfd driver
or just make use of syscon, which is already a mfd. Ultimately, the
decision to use a simple syscon interface was reached.[1]

[1] https://lkml.org/lkml/2014/7/30/514

[dinguyen] Fixed Kconfig to have EDAC_ALTERA_MC as a tristate to prevent a
build failure for allmodconfig.

Signed-off-by: Thor Thayer &lt;tthayer@opensource.altera.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
[dinguyen] cleaned up commit message
Signed-off-by: Dinh Nguyen &lt;dinguyen@opensource.altera.com&gt;
</content>
</entry>
<entry>
<title>ie31200_edac: Introduce the driver</title>
<updated>2014-07-04T12:00:26Z</updated>
<author>
<name>Jason Baron</name>
<email>jbaron@akamai.com</email>
</author>
<published>2014-07-04T11:48:32Z</published>
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<id>urn:sha1:7ee40b897d18ab03111eda9a6a0550e98166eada</id>
<content type='text'>
Add a driver for the E3-1200 series of Intel DRAM controllers, based on
the following E3-1200 specs:

http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200-family-vol-2-datasheet.html
http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200v3-vol-2-datasheet.html

I've tested this on bad memory hardware, and observed correlating bad
reads and uncorrected memory errors as reported by the driver.

Tested against:

CPU E3-1270 v3 @ 3.50GHz : 8086:0c08 (haswell)
CPU E3-1270 V2 @ 3.50GHz : 8086:0158 (ivy bridge)
CPU E31270 @ 3.40GHz : 8086:0108 (sandy bridge)

Signed-off-by: Jason Baron &lt;jbaron@akamai.com&gt;
Link: http://lkml.kernel.org/r/95c83e80dd40b5377e8bb206285c5d95ac623872.1403818526.git.jbaron@akamai.com
[ Boris: realign defines ]
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>ghes_edac: Register at EDAC core the BIOS report</title>
<updated>2013-02-25T22:42:12Z</updated>
<author>
<name>Mauro Carvalho Chehab</name>
<email>mchehab@redhat.com</email>
</author>
<published>2013-02-15T09:11:57Z</published>
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<id>urn:sha1:77c5f5d2f212e1963063e427fc57c44bf6eae9fb</id>
<content type='text'>
Register GHES at EDAC MC core, in order to avoid other
drivers to also handle errors and mangle with error data.

The edac core will warrant that just one driver will be used,
so the first one to register (BIOS first) will be the one that
will be reporting the hardware errors.

For now, the EDAC driver does nothing but to register at the
EDAC core, preventing the hardware-driven mechanism to
interfere with GHES.

Signed-off-by: Mauro Carvalho Chehab &lt;mchehab@redhat.com&gt;
</content>
</entry>
<entry>
<title>MIPS: Cavium: Add EDAC support.</title>
<updated>2012-12-12T15:48:49Z</updated>
<author>
<name>Ralf Baechle</name>
<email>ralf@linux-mips.org</email>
</author>
<published>2012-10-16T22:39:09Z</published>
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<id>urn:sha1:f65aad41772f6a0022e9763fe06f47604449964c</id>
<content type='text'>
Drivers for EDAC on Cavium.  Supported subsystems are:

 o CPU primary caches.  These are parity protected only, so only error
   reporting.
 o Second level cache - ECC protected, provides SECDED.
 o Memory: ECC / SECDEC if used with suitable DRAM modules.  The driver will
   will only initialize if ECC is enabled on a system so is safe to run on
   non-ECC memory.
 o PCI: Parity error reporting

Since it is very hard to test this sort of code the implementation is very
conservative and uses polling where possible for now.

Signed-off-by: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Reviewed-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
</content>
</entry>
</feed>
