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<title>linux/drivers/edac, branch v5.11</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.11</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.11'/>
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<updated>2020-12-15T20:53:37Z</updated>
<entry>
<title>Merge branch 'akpm' (patches from Andrew)</title>
<updated>2020-12-15T20:53:37Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-12-15T20:53:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ac73e3dc8acd0a3be292755db30388c3580f5674'/>
<id>urn:sha1:ac73e3dc8acd0a3be292755db30388c3580f5674</id>
<content type='text'>
Merge misc updates from Andrew Morton:

 - a few random little subsystems

 - almost all of the MM patches which are staged ahead of linux-next
   material. I'll trickle to post-linux-next work in as the dependents
   get merged up.

Subsystems affected by this patch series: kthread, kbuild, ide, ntfs,
ocfs2, arch, and mm (slab-generic, slab, slub, dax, debug, pagecache,
gup, swap, shmem, memcg, pagemap, mremap, hmm, vmalloc, documentation,
kasan, pagealloc, memory-failure, hugetlb, vmscan, z3fold, compaction,
oom-kill, migration, cma, page-poison, userfaultfd, zswap, zsmalloc,
uaccess, zram, and cleanups).

* emailed patches from Andrew Morton &lt;akpm@linux-foundation.org&gt;: (200 commits)
  mm: cleanup kstrto*() usage
  mm: fix fall-through warnings for Clang
  mm: slub: convert sysfs sprintf family to sysfs_emit/sysfs_emit_at
  mm: shmem: convert shmem_enabled_show to use sysfs_emit_at
  mm:backing-dev: use sysfs_emit in macro defining functions
  mm: huge_memory: convert remaining use of sprintf to sysfs_emit and neatening
  mm: use sysfs_emit for struct kobject * uses
  mm: fix kernel-doc markups
  zram: break the strict dependency from lzo
  zram: add stat to gather incompressible pages since zram set up
  zram: support page writeback
  mm/process_vm_access: remove redundant initialization of iov_r
  mm/zsmalloc.c: rework the list_add code in insert_zspage()
  mm/zswap: move to use crypto_acomp API for hardware acceleration
  mm/zswap: fix passing zero to 'PTR_ERR' warning
  mm/zswap: make struct kernel_param_ops definitions const
  userfaultfd/selftests: hint the test runner on required privilege
  userfaultfd/selftests: fix retval check for userfaultfd_open()
  userfaultfd/selftests: always dump something in modes
  userfaultfd: selftests: make __{s,u}64 format specifiers portable
  ...
</content>
</entry>
<entry>
<title>edac: ghes: use krealloc_array()</title>
<updated>2020-12-15T20:13:37Z</updated>
<author>
<name>Bartosz Golaszewski</name>
<email>bgolaszewski@baylibre.com</email>
</author>
<published>2020-12-15T03:04:12Z</published>
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<id>urn:sha1:af11be05b6d0b35da45f6457ef1f871634a50b1f</id>
<content type='text'>
Use the helper that checks for overflows internally instead of manually
calculating the size of the new array.

Link: https://lkml.kernel.org/r/20201109110654.12547-7-brgl@bgdev.pl
Signed-off-by: Bartosz Golaszewski &lt;bgolaszewski@baylibre.com&gt;
Acked-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: Alexander Shishkin &lt;alexander.shishkin@linux.intel.com&gt;
Cc: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Cc: Borislav Petkov &lt;bp@alien8.de&gt;
Cc: Christian Knig &lt;christian.koenig@amd.com&gt;
Cc: Christoph Lameter &lt;cl@linux.com&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Cc: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: David Rientjes &lt;rientjes@google.com&gt;
Cc: Gustavo Padovan &lt;gustavo@padovan.org&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Jaroslav Kysela &lt;perex@perex.cz&gt;
Cc: Jason Wang &lt;jasowang@redhat.com&gt;
Cc: Joonsoo Kim &lt;iamjoonsoo.kim@lge.com&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Cc: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: Maxime Ripard &lt;mripard@kernel.org&gt;
Cc: "Michael S . Tsirkin" &lt;mst@redhat.com&gt;
Cc: Pekka Enberg &lt;penberg@kernel.org&gt;
Cc: Robert Richter &lt;rric@kernel.org&gt;
Cc: Sumit Semwal &lt;sumit.semwal@linaro.org&gt;
Cc: Takashi Iwai &lt;tiwai@suse.com&gt;
Cc: Takashi Iwai &lt;tiwai@suse.de&gt;
Cc: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
Cc: Tony Luck &lt;tony.luck@intel.com&gt;
Cc: Vlastimil Babka &lt;vbabka@suse.cz&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'x86_cpu_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip</title>
<updated>2020-12-14T21:21:33Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-12-14T21:21:33Z</published>
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<id>urn:sha1:0d712978dcdd9c4fb2c4e4ef7700ee755184f11d</id>
<content type='text'>
Pull x86 cpuid updates from Borislav Petkov:
 "Only AMD-specific changes this time:

   - Save the AMD physical die ID into cpuinfo_x86.cpu_die_id and
     convert all code to use it (Yazen Ghannam)

   - Remove a dead and unused TSEG region remapping workaround on AMD
     (Arvind Sankar)"

* tag 'x86_cpu_for_v5.11' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/cpu/amd: Remove dead code for TSEG region remapping
  x86/topology: Set cpu_die_id only if DIE_TYPE found
  EDAC/mce_amd: Use struct cpuinfo_x86.cpu_die_id for AMD NodeId
  x86/CPU/AMD: Remove amd_get_nb_id()
  x86/CPU/AMD: Save AMD NodeId as cpu_die_id
</content>
</entry>
<entry>
<title>Merge branches 'edac-spr', 'edac-igen6' and 'edac-misc' into edac-updates-for-v5.11</title>
<updated>2020-12-14T10:51:46Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2020-12-14T10:51:46Z</published>
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<id>urn:sha1:f84b799996e29ad3b37e83f7871e79023f29979d</id>
<content type='text'>
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>EDAC/mv64x60: Remove orphan mv64x60 driver</title>
<updated>2020-12-07T11:16:02Z</updated>
<author>
<name>Michael Ellerman</name>
<email>mpe@ellerman.id.au</email>
</author>
<published>2020-12-07T04:02:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0385979a30dc4abdef2dcebbccef818947c80cb7'/>
<id>urn:sha1:0385979a30dc4abdef2dcebbccef818947c80cb7</id>
<content type='text'>
The mv64x60 EDAC driver depends on CONFIG_MV64X60. But that symbol is
not user-selectable, and the last code that selected it was removed
with the C2K board support in 2018, see:

  92c8c16f3457 ("powerpc/embedded6xx: Remove C2K board support")

That means the driver is now dead code, so remove it.

Suggested-by: Borislav Petkov &lt;bp@alien8.de&gt;
Signed-off-by: Michael Ellerman &lt;mpe@ellerman.id.au&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lkml.kernel.org/r/20201207040253.628528-1-mpe@ellerman.id.au
</content>
</entry>
<entry>
<title>EDAC/aspeed: Add support for AST2400 and AST2600</title>
<updated>2020-12-07T11:05:41Z</updated>
<author>
<name>Troy Lee</name>
<email>troy_lee@aspeedtech.com</email>
</author>
<published>2020-12-07T09:00:13Z</published>
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<id>urn:sha1:edfc2d73ca45da19fb76f9b76ecc6e885d74d093</id>
<content type='text'>
Add AST2400 and AST2600 EDAC driver support.

Signed-off-by: Troy Lee &lt;troy_lee@aspeedtech.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Stefan Schaeckeler &lt;sschaeck@cisco.com&gt;
Link: https://lkml.kernel.org/r/20201207090013.14145-3-troy_lee@aspeedtech.com
</content>
</entry>
<entry>
<title>EDAC/amd64: Fix PCI component registration</title>
<updated>2020-11-27T10:11:16Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2020-11-22T14:57:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=706657b1febf446a9ba37dc51b89f46604f57ee9'/>
<id>urn:sha1:706657b1febf446a9ba37dc51b89f46604f57ee9</id>
<content type='text'>
In order to setup its PCI component, the driver needs any node private
instance in order to get a reference to the PCI device and hand that
into edac_pci_create_generic_ctl(). For convenience, it uses the 0th
memory controller descriptor under the assumption that if any, the 0th
will be always present.

However, this assumption goes wrong when the 0th node doesn't have
memory and the driver doesn't initialize an instance for it:

  EDAC amd64: F17h detected (node 0).
  ...
  EDAC amd64: Node 0: No DIMMs detected.

But looking up node instances is not really needed - all one needs is
the pointer to the proper device which gets discovered during instance
init.

So stash that pointer into a variable and use it when setting up the
EDAC PCI component.

Clear that variable when the driver needs to unwind due to some
instances failing init to avoid any registration imbalance.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lkml.kernel.org/r/20201122150815.13808-1-bp@alien8.de
</content>
</entry>
<entry>
<title>EDAC/igen6: ecclog_llist can be static</title>
<updated>2020-11-23T18:11:08Z</updated>
<author>
<name>kernel test robot</name>
<email>lkp@intel.com</email>
</author>
<published>2020-11-23T03:18:50Z</published>
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<id>urn:sha1:77429eebd9b1af516bf1b6898e63b098ed748374</id>
<content type='text'>
Fixes: 10590a9d4f23 ("EDAC/igen6: Add EDAC driver for Intel client SoCs using IBECC")
Reported-by: kernel test robot &lt;lkp@intel.com&gt;
Signed-off-by: kernel test robot &lt;lkp@intel.com&gt;
Link: https://lore.kernel.org/r/20201123031850.GA20416@aef56166e5fc
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>EDAC/i10nm: Add Intel Sapphire Rapids server support</title>
<updated>2020-11-19T20:57:26Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2020-11-17T12:49:53Z</published>
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<id>urn:sha1:479f58dda25bb46daeb937f124718e8b4aea6781</id>
<content type='text'>
The Sapphire Rapids CPU model shares the same memory controller
architecture with Ice Lake server. There are some configurations
different from Ice Lake server as below:
- The device ID for configuration agent.
- The size for per channel memory-mapped I/O.
- The DDR5 memory support.
So add the above configurations and the Sapphire Rapids CPU model
ID for EDAC support.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
<entry>
<title>EDAC: Add DDR5 new memory type</title>
<updated>2020-11-19T20:57:09Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2020-11-17T12:49:52Z</published>
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<id>urn:sha1:bc1c99a5971aa7571e8b9731c28fa32abe12cab8</id>
<content type='text'>
Add a new entry to 'enum mem_type' and a new string to
'edac_mem_types[]' for DDR5 new memory type.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
</content>
</entry>
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