<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/edac, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-06-18T18:25:25Z</updated>
<entry>
<title>EDAC/amd64: Read back the scrub rate PCI register on F15h</title>
<updated>2020-06-18T18:25:25Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2020-06-18T18:25:25Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ee470bb25d0dcdf126f586ec0ae6dca66cb340a4'/>
<id>urn:sha1:ee470bb25d0dcdf126f586ec0ae6dca66cb340a4</id>
<content type='text'>
Commit:

  da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h")

added support for F15h, model 0x60 CPUs but in doing so, missed to read
back SCRCTRL PCI config register on F15h CPUs which are *not* model
0x60. Add that read so that doing

  $ cat /sys/devices/system/edac/mc/mc0/sdram_scrub_rate

can show the previously set DRAM scrub rate.

Fixes: da92110dfdfa ("EDAC, amd64_edac: Extend scrub rate support to F15hM60h")
Reported-by: Anders Andersson &lt;pipatron@gmail.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: &lt;stable@vger.kernel.org&gt; #v4.4..
Link: https://lkml.kernel.org/r/CAKkunMbNWppx_i6xSdDHLseA2QQmGJqj_crY=NF-GZML5np4Vw@mail.gmail.com
</content>
</entry>
<entry>
<title>Merge tag 'kbuild-v5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild</title>
<updated>2020-06-13T20:29:16Z</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2020-06-13T20:29:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6adc19fd13f11883c44df67b551cf8201e6bba1d'/>
<id>urn:sha1:6adc19fd13f11883c44df67b551cf8201e6bba1d</id>
<content type='text'>
Pull more Kbuild updates from Masahiro Yamada:

 - fix build rules in binderfs sample

 - fix build errors when Kbuild recurses to the top Makefile

 - covert '---help---' in Kconfig to 'help'

* tag 'kbuild-v5.8-2' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild:
  treewide: replace '---help---' in Kconfig files with 'help'
  kbuild: fix broken builds because of GZIP,BZIP2,LZOP variables
  samples: binderfs: really compile this sample and fix build issues
</content>
</entry>
<entry>
<title>treewide: replace '---help---' in Kconfig files with 'help'</title>
<updated>2020-06-13T16:57:21Z</updated>
<author>
<name>Masahiro Yamada</name>
<email>masahiroy@kernel.org</email>
</author>
<published>2020-06-13T16:50:22Z</published>
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<id>urn:sha1:a7f7f6248d9740d710fd6bd190293fe5e16410ac</id>
<content type='text'>
Since commit 84af7a6194e4 ("checkpatch: kconfig: prefer 'help' over
'---help---'"), the number of '---help---' has been gradually
decreasing, but there are still more than 2400 instances.

This commit finishes the conversion. While I touched the lines,
I also fixed the indentation.

There are a variety of indentation styles found.

  a) 4 spaces + '---help---'
  b) 7 spaces + '---help---'
  c) 8 spaces + '---help---'
  d) 1 space + 1 tab + '---help---'
  e) 1 tab + '---help---'    (correct indentation)
  f) 1 tab + 1 space + '---help---'
  g) 1 tab + 2 spaces + '---help---'

In order to convert all of them to 1 tab + 'help', I ran the
following commend:

  $ find . -name 'Kconfig*' | xargs sed -i 's/^[[:space:]]*---help---/\thelp/'

Signed-off-by: Masahiro Yamada &lt;masahiroy@kernel.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'x86/entry' into ras/core</title>
<updated>2020-06-11T13:17:57Z</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2020-06-11T13:17:57Z</published>
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<id>urn:sha1:f77d26a9fc525286bcef3d4f98b52e17482cf49c</id>
<content type='text'>
to fixup conflicts in arch/x86/kernel/cpu/mce/core.c so MCE specific follow
up patches can be applied without creating a horrible merge conflict
afterwards.
</content>
</entry>
<entry>
<title>Merge branches 'edac-i10nm' and 'edac-misc' into edac-updates-for-5.8</title>
<updated>2020-06-01T09:39:15Z</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2020-06-01T09:39:15Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2a02ca0428cfe68cce600111acb4c6f7d85cf71f'/>
<id>urn:sha1:2a02ca0428cfe68cce600111acb4c6f7d85cf71f</id>
<content type='text'>
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>EDAC/amd64: Remove redundant assignment to variable ret in hw_info_get()</title>
<updated>2020-05-29T13:15:02Z</updated>
<author>
<name>Colin Ian King</name>
<email>colin.king@canonical.com</email>
</author>
<published>2020-04-29T15:48:47Z</published>
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<id>urn:sha1:f00eb5ff2f6ffc4a2f0fc0e829410082bff0f78e</id>
<content type='text'>
The variable ret is being assigned with a value that is never read
and it is being updated later with a new value. The initialization is
redundant so remove it.

Signed-off-by: Colin Ian King &lt;colin.king@canonical.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lkml.kernel.org/r/20200429154847.287001-1-colin.king@canonical.com
</content>
</entry>
<entry>
<title>EDAC/amd64: Add AMD family 17h model 60h PCI IDs</title>
<updated>2020-05-22T16:43:13Z</updated>
<author>
<name>Alexander Monakov</name>
<email>amonakov@ispras.ru</email>
</author>
<published>2020-05-10T20:48:42Z</published>
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<id>urn:sha1:b6bea24d41519e8c31e4798f1c1a3f67e540c5d0</id>
<content type='text'>
Add support for AMD Renoir (4000-series Ryzen CPUs).

Signed-off-by: Alexander Monakov &lt;amonakov@ispras.ru&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: Yazen Ghannam &lt;yazen.ghannam@amd.com&gt;
Link: https://lkml.kernel.org/r/20200510204842.2603-4-amonakov@ispras.ru
</content>
</entry>
<entry>
<title>EDAC/skx: Use the mcmtr register to retrieve close_pg/bank_xor_enable</title>
<updated>2020-05-19T22:11:29Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2020-05-15T12:34:06Z</published>
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<id>urn:sha1:1032095053b34d474aa20f2625d97dd306e0991b</id>
<content type='text'>
The skx_edac driver wrongly uses the mtr register to retrieve two fields
close_pg and bank_xor_enable. Fix it by using the correct mcmtr register
to get the two fields.

Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Reported-by: Matthew Riley &lt;mattdr@google.com&gt;
Acked-by: Aristeu Rozanski &lt;aris@redhat.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Link: https://lore.kernel.org/r/20200515210146.1337-1-tony.luck@intel.com
</content>
</entry>
<entry>
<title>EDAC/i10nm: Update driver to support different bus number config register offsets</title>
<updated>2020-04-27T16:40:49Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2020-04-24T12:18:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ce20670828c1228ecd37befbdda87a1f87a803b9'/>
<id>urn:sha1:ce20670828c1228ecd37befbdda87a1f87a803b9</id>
<content type='text'>
The i10nm_edac driver failed to load on Ice Lake and Tremont/Jacobsville
servers if their CPU stepping &gt;= 4 and failed on Ice Lake-D servers from
stepping 0. The root cause was that for Ice Lake and Tremont/Jacobsville
servers with CPU stepping &gt;=4, the offset for bus number configuration
register was updated from 0xcc to 0xd0. For Ice Lake-D servers, all the
steppings use the updated 0xd0 offset.

Fix the issue by using the appropriate offset for bus number
configuration register according to the CPU model number and stepping.

Reported-by: Jerry Chen &lt;jerry.t.chen@intel.com&gt;
Reported-and-tested-by: Jin Wen &lt;wen.jin@intel.com&gt;
Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Reviewed-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lore.kernel.org/linux-edac/20200427084022.GC11036@zn.tnic
</content>
</entry>
<entry>
<title>EDAC, {skx,i10nm}: Make some configurations CPU model specific</title>
<updated>2020-04-27T16:29:41Z</updated>
<author>
<name>Qiuxu Zhuo</name>
<email>qiuxu.zhuo@intel.com</email>
</author>
<published>2020-04-24T12:18:14Z</published>
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<id>urn:sha1:ee5340abab3babb91c1807cea47de4468b2dfc91</id>
<content type='text'>
The device ID for configuration agent PCI device and the offset for
bus number configuration register can be CPU model specific. So add
a new structure res_config to make them configurable and pass res_config
to {skx,i10nm}_init() and skx_get_all_bus_mappings() for use.

Signed-off-by: Qiuxu Zhuo &lt;qiuxu.zhuo@intel.com&gt;
Signed-off-by: Tony Luck &lt;tony.luck@intel.com&gt;
Reviewed-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: https://lore.kernel.org/r/20200427083246.GB11036@zn.tnic
</content>
</entry>
</feed>
