<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/Makefile, branch v5.1</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.1</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.1'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-01-25T21:15:36Z</updated>
<entry>
<title>drm/amdgpu: remove old CI DPM implementation</title>
<updated>2019-01-25T21:15:36Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2019-01-16T16:55:04Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bc4b539e38508839a6c85d5c5ff52d32f6471fab'/>
<id>urn:sha1:bc4b539e38508839a6c85d5c5ff52d32f6471fab</id>
<content type='text'>
The power smu7 powerplay code is much more robust and has
been the default for a while now.  Remove the old code.

Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: separate amdgpu_rlc into a single file</title>
<updated>2018-11-09T21:29:02Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2018-11-08T05:43:46Z</published>
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<id>urn:sha1:88dfc9a3dd47027c9ffc831635e5cf4e8ed3b781</id>
<content type='text'>
Separate the function and struct of RLC from the file of GFX.
Abstract the function of amdgpu_gfx_rlc_fini.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move csa related code to separate file</title>
<updated>2018-11-05T19:21:49Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2018-10-19T05:35:48Z</published>
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<id>urn:sha1:7946340fa38965705f79273cef0cdc477239bf2d</id>
<content type='text'>
In baremetal, also need to reserve csa for preemption.
so move the csa related code out of sriov.

Reviewed-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu : Generate XGMI topology info from driver level</title>
<updated>2018-09-11T03:47:52Z</updated>
<author>
<name>Shaoyun Liu</name>
<email>Shaoyun.Liu@amd.com</email>
</author>
<published>2018-06-27T21:25:53Z</published>
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<id>urn:sha1:fb30fc59a245512b94a065ee1557d7e1ae88484a</id>
<content type='text'>
Driver will save an array of XGMI hive info, each hive will have a list of devices
that have the same hive ID.

Signed-off-by: Shaoyun Liu &lt;Shaoyun.Liu@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/gmc9: add a new gfxhub 1.1 helper for xgmi</title>
<updated>2018-09-11T03:46:22Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2018-06-19T22:03:27Z</published>
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<id>urn:sha1:bf0a60b78b61a7b31bb22e60cc7b2e7fc538d38f</id>
<content type='text'>
Used to populate the xgmi info on vega20.

v2: PF_MAX_REGION is val - 1 (Ray)

Acked-by: Huang Rui &lt;ray.huang@amd.com&gt;
Acked-by: Slava Abramov &lt;slava.abramov@amd.com&gt;
Reviewed-by :Shaoyun liu &lt;Shaoyun.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by :Shaoyun liu &lt;Shaoyun.liu@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Merge amdkfd into amdgpu</title>
<updated>2018-08-28T16:22:42Z</updated>
<author>
<name>Amber Lin</name>
<email>Amber.Lin@amd.com</email>
</author>
<published>2018-08-22T20:48:50Z</published>
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<id>urn:sha1:04d5e2765802241b54ee93d1e655123c39fa7385</id>
<content type='text'>
Since KFD is only supported by single GPU driver, it makes sense to merge
amdgpu and amdkfd into one module. This patch is the initial step: merge
Kconfig and Makefile.

v2: also remove kfd from drm Kconfig

Signed-off-by: Amber Lin &lt;Amber.Lin@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add amdgpu_gmc_pd_addr helper</title>
<updated>2018-08-27T16:11:19Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-08-22T10:22:14Z</published>
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<id>urn:sha1:11c3a249ff7a1c710011bd06a451956f2a40c30c</id>
<content type='text'>
Add a helper to get the root PD address and remove the workarounds from
the GMC9 code for that.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove the queue manager</title>
<updated>2018-08-27T16:10:47Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2018-07-16T13:19:20Z</published>
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<id>urn:sha1:869a53d4d7d7976d039b9389aa90b6f3d29ed234</id>
<content type='text'>
Not needed any more since that is now done by the scheduler.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add psp 11.0 support for vega20. (v2)</title>
<updated>2018-08-27T16:10:34Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2018-05-11T06:54:50Z</published>
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<id>urn:sha1:654f761cfa0454bbfdf50d5ed6dc004c92114a97</id>
<content type='text'>
Add psp 11.0 code for vega20 and enable it.  PSP is the
security processor for the GPU.  It handles firmware
loading and GPU resets among other things.

v2: whitespace fix, enable support, adjust reg includes (Alex)

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add nbio 7.4 support for vega20 (v3)</title>
<updated>2018-08-27T16:10:23Z</updated>
<author>
<name>Feifei Xu</name>
<email>Feifei.Xu@amd.com</email>
</author>
<published>2018-03-23T19:44:28Z</published>
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<id>urn:sha1:fe3c948918e7e3d18eed85571d32a2f7c4b63a84</id>
<content type='text'>
Some register offset in nbio v7.4 are different with v7.0.
We need a seperate nbio_v7_4.c for vega20.

v2: fix doorbell range for sdma (Alex)
v3: squash in static fix (kbuild test robot)

Signed-off-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
