<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/Makefile, branch v5.12</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.12</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.12'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-02-09T20:28:21Z</updated>
<entry>
<title>drm/amdgpu: implement smuio v11_0_6 callbacks</title>
<updated>2021-02-09T20:28:21Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2021-02-03T10:16:34Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1deb98534c239d4f45e10ebe62eade4f07352d16'/>
<id>urn:sha1:1deb98534c239d4f45e10ebe62eade4f07352d16</id>
<content type='text'>
Implement smuio v11_0_6 callbacks which will used by Sienna_Cichlid and
forward ASIC.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add secure display TA interface</title>
<updated>2021-01-14T04:58:14Z</updated>
<author>
<name>Jinzhou Su</name>
<email>Jinzhou.Su@amd.com</email>
</author>
<published>2020-12-09T02:57:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=ecaafb7b5ab6406587341d8727f237b3ee00dedf'/>
<id>urn:sha1:ecaafb7b5ab6406587341d8727f237b3ee00dedf</id>
<content type='text'>
Add interface to load, unload, invoke command for
secure display TA.

v2: Add debugfs interface for secure display TA
v3: fix warning in copy_from_user (Alex)

Signed-off-by: Jinzhou.Su &lt;Jinzhou.Su@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: switch hdp callback functions for hdp v5</title>
<updated>2021-01-05T16:33:08Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2020-12-28T09:02:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bf087285dcd7e553e37902c5201c50c2e65682d6'/>
<id>urn:sha1:bf087285dcd7e553e37902c5201c50c2e65682d6</id>
<content type='text'>
Switch to use the HDP functions which unified on hdp structure instead of
the scattered hdp callback functions.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: switch hdp callback functions for hdp v4</title>
<updated>2021-01-05T16:33:01Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2020-12-28T08:54:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=455d40c92713e9478ea9da057bf07719787c1c03'/>
<id>urn:sha1:455d40c92713e9478ea9da057bf07719787c1c03</id>
<content type='text'>
Switch to use the HDP functions which unified on hdp structure instead of
the scattered hdp callback functions.
V2: clean up hdp reset ras error count function.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: create vega20 ih blocks</title>
<updated>2020-12-23T20:05:35Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2020-12-18T13:48:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bebd4c79a4eb830801b5cd151d7161e0b5a28db4'/>
<id>urn:sha1:bebd4c79a4eb830801b5cd151d7161e0b5a28db4</id>
<content type='text'>
vega20 ih blocks will be used for vega20/arcturus

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Dennis Li &lt;Dennis.Li@amd.com&gt;
Reviewed-by: Feifei Xu &lt;Feifei.Xu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement smuio v11_0 callbacks</title>
<updated>2020-11-13T05:13:22Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2020-10-20T16:00:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=d1ffa512c635d5df81e18f2686b5e5060ca03f18'/>
<id>urn:sha1:d1ffa512c635d5df81e18f2686b5e5060ca03f18</id>
<content type='text'>
Vega20/Arcturus will use smuio v11_0 callbacks

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement smuio v9_0 callbacks</title>
<updated>2020-11-13T05:13:16Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2020-10-20T15:59:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=09aac699c3992c5ce12e82d3c9d1e4e19e1bd090'/>
<id>urn:sha1:09aac699c3992c5ce12e82d3c9d1e4e19e1bd090</id>
<content type='text'>
Vega10/12 will use smuio v9_0 callbacks

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: added support for psp fw attestation</title>
<updated>2020-10-26T17:27:00Z</updated>
<author>
<name>John Clements</name>
<email>john.clements@amd.com</email>
</author>
<published>2020-10-26T06:57:13Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=19ae333001b375bbc7d1ff9eaa9cbb0a72fff65e'/>
<id>urn:sha1:19ae333001b375bbc7d1ff9eaa9cbb0a72fff65e</id>
<content type='text'>
loaded fw can be queried from sys fs interface

Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: John Clements &lt;john.clements@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: initialize IP offset for dimgrey_cavefish</title>
<updated>2020-10-12T18:00:20Z</updated>
<author>
<name>Tao Zhou</name>
<email>tao.zhou1@amd.com</email>
</author>
<published>2020-10-02T15:34:02Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=038d757b95f51dd59ae8852c981971cb48e8df0b'/>
<id>urn:sha1:038d757b95f51dd59ae8852c981971cb48e8df0b</id>
<content type='text'>
Add ip offset definition for dimgrey_cavefish and initialize it.

Signed-off-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Jiansong Chen &lt;Jiansong.Chen@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add nbio v7.2 for vangogh (v2)</title>
<updated>2020-10-05T19:15:27Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2020-08-27T16:02:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a7e91bd71848db26cef3502f5f8196f83e7a8d36'/>
<id>urn:sha1:a7e91bd71848db26cef3502f5f8196f83e7a8d36</id>
<content type='text'>
VanGogh uses nbio v7.2, and a couple of offsets are changed since nbio
v2.3 for navi series, so add new nbio v7.2 block.

v2: squash in fix for sdma and vcn instances

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
