<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/Makefile, branch v5.19</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.19</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.19'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2022-05-10T21:53:11Z</updated>
<entry>
<title>drm/amdgpu: add lsdma block</title>
<updated>2022-05-10T21:53:11Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2022-05-05T17:57:30Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=1b491330421bb0fdeff8eb928ce83fdd636087d3'/>
<id>urn:sha1:1b491330421bb0fdeff8eb928ce83fdd636087d3</id>
<content type='text'>
Add Light SDMA (LSDMA) block and related function. LSDMA
is a small instance of SDMA mainly for kernel driver use.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/vcn: add common vcn sofware ring decode</title>
<updated>2022-05-06T20:57:36Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2022-05-03T16:18:49Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=60a2e9eecf1676e3d59f050e5c9688830d7425cc'/>
<id>urn:sha1:60a2e9eecf1676e3d59f050e5c9688830d7425cc</id>
<content type='text'>
Add common vcn sofware ring decode.

v2: fixed compiling error

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Christian Koenig &lt;Christian.Koenig@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add the files of HDP v5.2 block</title>
<updated>2022-05-06T14:36:13Z</updated>
<author>
<name>Xiaojian Du</name>
<email>Xiaojian.Du@amd.com</email>
</author>
<published>2021-12-14T08:16:33Z</published>
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<id>urn:sha1:78039df8e8d24aa62611941b2d7e566c7020e729</id>
<content type='text'>
This patch is to add the files of HDP v5.2 block.
HDP (Host Data Port) is the IP which handles
host access to VRAM via the PCI BAR.

Signed-off-by: Xiaojian Du &lt;Xiaojian.Du@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add the files of NBIO v7.7 block</title>
<updated>2022-05-06T14:36:13Z</updated>
<author>
<name>Xiaojian Du</name>
<email>Xiaojian.Du@amd.com</email>
</author>
<published>2021-12-14T08:14:48Z</published>
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<id>urn:sha1:810ecd40015c25b315b8cada7e86bfe2a7b55741</id>
<content type='text'>
This patch is to add the files of NBIO v7.7 block.
NBIO (New Bus IO) is the block which handles
the GPU interface to the PCIe bus.

v2: squash in register name fix (Xiaojian)

Signed-off-by: Xiaojian Du &lt;Xiaojian.Du@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add mmhub v3_0_2 ip callback functions</title>
<updated>2022-05-05T20:51:48Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2022-04-06T10:28:53Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=9fa57397d933a83f5fafc2e3bd4ab3626bf9aed9'/>
<id>urn:sha1:9fa57397d933a83f5fafc2e3bd4ab3626bf9aed9</id>
<content type='text'>
Unlike mmhub v3_0_0, there is no atc_l2 related
registers available in mmhub v3_0_2. Split the mmhub
v3_0_2 callback implementations from mmhub v3_0 so we
don't need to add ip version check when atc related
programming needs to be added to mmhub v3_0_0.

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/jpeg: add jpeg support for VCN4_0_0</title>
<updated>2022-05-04T14:43:56Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2021-10-09T20:58:10Z</published>
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<id>urn:sha1:b13111de32a9202c6d58bb7e4c06296b99c4d7e3</id>
<content type='text'>
Add jpeg support for VCN4_0_0.

Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Sonny Jiang &lt;sonny.jiang@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VCN4 ip block support</title>
<updated>2022-05-04T14:43:56Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2022-04-13T15:45:03Z</published>
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<id>urn:sha1:8da1170a16e4d4b49fa07d1f75ad480847ff7eca</id>
<content type='text'>
Add VCN 4.0 initialization and decoder/encoder ring functions.

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add initial support for sdma v6.0</title>
<updated>2022-05-04T14:43:55Z</updated>
<author>
<name>Stanley Yang</name>
<email>Stanley.Yang@amd.com</email>
</author>
<published>2022-04-13T18:26:40Z</published>
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<id>urn:sha1:61a039d1757b148717b9e10ea0cd30e5da6cf919</id>
<content type='text'>
Add functions for SDMA version 6.

Signed-off-by: Stanley Yang &lt;Stanley.Yang@amd.com&gt;
Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Add KFD support for soc21 v3</title>
<updated>2022-05-04T14:43:54Z</updated>
<author>
<name>Mukul Joshi</name>
<email>mukul.joshi@amd.com</email>
</author>
<published>2022-04-26T17:00:11Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cc009e613de6560eb499f8bc92c80a737752cb30'/>
<id>urn:sha1:cc009e613de6560eb499f8bc92c80a737752cb30</id>
<content type='text'>
Add initial support for soc21 in KFD compute
driver (Mukul)
- Add new definition for soc21 device.
- Add new file for amdgpu-kfd interface for GFX11 family.
- Add new file for queue management, interrupt handling,
  mqd management for GFX11 family in KFD driver.
- Related changes/updates for soc21 device in
  KFD driver.
- Repurpose last 2 entries of SDMA MQD for driver use.

v2: Add an optional argument into update queue operation (Mukul)

v3: Switch to ip version check, replace kgd_dev with
    amdgpu_device (Hawking)

Signed-off-by: Mukul Joshi &lt;mukul.joshi@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Oak Zeng &lt;Oak.Zeng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add init support for GFX11 (v2)</title>
<updated>2022-05-04T14:43:54Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2022-04-13T18:27:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3d879e81f0f9ed5d33b5eda0fe5226c884bb8073'/>
<id>urn:sha1:3d879e81f0f9ed5d33b5eda0fe5226c884bb8073</id>
<content type='text'>
Add initial support for GC version 11.  GC is
the graphics and compute block on the GPU.

v1: add initial gfx11 support (Wenhui)
v2: switch to new amdgpu_gfx_is_high_priority_compute_queue
    interface (Hawking)
v3: fix num_mec (Alex)

Signed-off-by: Wenhui Sheng &lt;Wenhui.Sheng@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
