linux/drivers/gpu/drm/amd/amdgpu/Makefile, branch v5.3

amdgpu: make pmu support optional

2019-07-08T18:56:22Z

When CONFIG_PERF_EVENTS is disabled, we cannot compile the pmu portion of the amdgpu driver: drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:48:38: error: no member named 'hw' in 'struct perf_event' struct hw_perf_event *hwc = &event->hw; ~~~~~ ^ drivers/gpu/drm/amd/amdgpu/amdgpu_pmu.c:51:13: error: no member named 'attr' in 'struct perf_event' if (event->attr.type != event->pmu->type) ~~~~~ ^ ... Use conditional compilation for this file. Fixes: 9c7c85f7ea1f ("drm/amdgpu: add pmu counters") Signed-off-by: Arnd Bergmann Signed-off-by: Alex Deucher

drm/amdgpu: Add navi10 kfd support for amdgpu (v3)

2019-06-21T23:59:23Z

KFD (Kernel Fusion Driver) is the compute backend driver for AMD GPUs. v2: squash in updates (Alex) v3: fix warnings (Alex) Signed-off-by: Oak Zeng Signed-off-by: Philip Cox Signed-off-by: Hawking Zhang Acked-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add navi10 common ip block (v3)

2019-06-21T23:59:23Z

This adds the core SOC code for navi asics. v1: add place holder and initial basic function (Ray) v2: add new introduced functions to avoid reference NULL pointer (Hawking) v3L squash in updates (Alex) Signed-off-by: Huang Rui Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: add gfx v10 implementation (v10)

2019-06-21T23:59:23Z

GFX is the graphics and compute block on the GPU. v1: add initial gfx v10 implementation (Ray) v2: convert to new get_vm_pde function in emit_vm_flush (Hawking) v3: switch to new emit ib interfaces (Hawking) v4: squash in updates (Alex) v5: remove unused variables (Alex) v6: v6: some golden regs moved to vbios (Alex) v7: squash in some cleanups (Alex) v8: squash in golden settings update (Alex) v9: squash in whitespace fixes (Ernst Sjöstrand, Alex) v10: squash in GDS backup size fix and GDS/GWS/OA removal rebase fixes (Hawking) Signed-off-by: Huang Rui Signed-off-by: Hawking Zhang Acked-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu/mes10.1: add ip block mes10.1 (v2)

2019-06-21T23:58:22Z

MES takes over the scheduling capability of GFX and SDMA, add MES as a standalone ip. v2: squash in updates (Alex) Acked-by: Hawking Zhang Signed-off-by: Jack Xiao Signed-off-by: Alex Deucher

drm/amdgpu: add initial VCN2.0 support (v2)

2019-06-21T23:58:22Z

VCN (Video Core Next) is the video encode/decode block. Porting over the same functions from VCN1.0 v2: squash in updates (Alex) Signed-off-by: Leo Liu Reviewed-by: Alex Deucher Reviewed-by: James Zhu Signed-off-by: Alex Deucher

drm/amdgpu: add initial support for sdma v5.0 (v6)

2019-06-21T23:58:21Z

SDMA (System DMA) is a general purpose DMA engine usable by UMDs for transfers or the kernel for paging or GPUVM updates. v1: support basic funcitonalites includes rb, ib, vm, copy buffer and trap irq v2: convert to use new get_vm_pde in emit_vm_flush v3: retire amdgpu_ttm_set_active_vram_size from sdma v5 v4: retire the redundant hdp_invalidate implementation v5: squash in updates v6: some golden regs moved to vbios Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu/discovery: add ip discovery initial support

2019-06-21T23:58:21Z

The IP discovery table lists is populated by the psp at power on and includes all of the hw details on the board: - List of IPs and MMIO offsets - IP harvest details - IP configuration details v2: prefix struct and function names with 'amdgpu' v3: read table binary from vram using mmMM_INDEX and mmMM_DATA update TABLE_BINARY_MAX_SIZE to 64kb (1 TMR) add 'instance_number' field per ip info consider endianness and replace uint8/16/32_t with u8/16/32 initialize register base addresses initialize adev->gfx.config and adev->gfx.cu_info to replace gpu info fw get major and minor version using a single api don't expose internal data structures in amdgpu_discovery.h v4: RCC_CONFIG_MEMSIZE is in MB units hold mmio_idx_lock while reading ip discovery binary v5: pick out discovery.h as a cross-OS header do structure pointer cast directly consider endianness while using the member of structure convert base addresses to dword at boot up, PSP BL copies ip discovery binary from VBIOS(SPIROM) image to the top of the frame buffer (just below the reserved regions for PSP & SMU). ip discovery data table includes the collection of each ip's identification number, base addresses, version number, and harvest setting placeholder. gc data table includes gfx info structure. Signed-off-by: Xiaojie Yuan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: add navi10 ih ip block (v3)

2019-06-21T02:35:30Z

IH is the interrupt handler block. v1: add initial ih support (Ray) v2: add dummy prescreen iv function for navi10 (Hawking) v3: squash in additional updates (Alex) Signed-off-by: Huang Rui Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher

drm/amdgpu: add gmc v10 ip block for navi10 (v6)

2019-06-21T02:35:29Z

GMC in the GPU memory controller. v1: add place holder and initial basic implementation (Ray) v2: retire unused amdgpu_gart_set_defaults (Hawking) v3: re-work get_vm_pde function (Hawking) v4: replace legacy amdgpu_vram/gtt_location with amdgpu_gmc_vram/gtt_location (Hawking) v5: squash in updates (Alex) v6: use get_vbios_fb_size (Alex) Signed-off-by: Huang Rui Signed-off-by: Hawking Zhang Reviewed-by: Alex Deucher Reviewed-by: Hawking Zhang Signed-off-by: Alex Deucher