<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/Makefile, branch v5.9</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.9</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.9'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-07-01T05:59:24Z</updated>
<entry>
<title>drm amdgpu: SI UVD add uvd_v3_1 to makefile</title>
<updated>2020-07-01T05:59:24Z</updated>
<author>
<name>Sonny Jiang</name>
<email>sonny.jiang@amd.com</email>
</author>
<published>2020-06-10T20:19:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=74df08fddf44a7d1a48eeae1dc0a72c60eb9cc4b'/>
<id>urn:sha1:74df08fddf44a7d1a48eeae1dc0a72c60eb9cc4b</id>
<content type='text'>
Signed-off-by: Sonny Jiang &lt;sonny.jiang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdkfd: Support Sienna_Cichlid KFD v4</title>
<updated>2020-07-01T05:59:11Z</updated>
<author>
<name>Yong Zhao</name>
<email>Yong.Zhao@amd.com</email>
</author>
<published>2019-10-01T21:42:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3a2f0c813b42996a8fdb14da2cd828156a6fdd12'/>
<id>urn:sha1:3a2f0c813b42996a8fdb14da2cd828156a6fdd12</id>
<content type='text'>
v4: drop get_tile_config, comment out other callbacks

Signed-off-by: Yong Zhao &lt;Yong.Zhao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add JPEG3.0 support for Sienna_Cichlid</title>
<updated>2020-07-01T05:59:09Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-11-15T18:23:10Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dfd57dbf44ddc70c90c76f83b2deb46e5dd40ce3'/>
<id>urn:sha1:dfd57dbf44ddc70c90c76f83b2deb46e5dd40ce3</id>
<content type='text'>
With basic IP block functions and ring functions

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add VCN3.0 support for Sienna_Cichlid</title>
<updated>2020-07-01T05:59:09Z</updated>
<author>
<name>Leo Liu</name>
<email>leo.liu@amd.com</email>
</author>
<published>2019-11-15T17:45:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=cf14826cdfb5c9fe10f98210d040b9d7486c381d'/>
<id>urn:sha1:cf14826cdfb5c9fe10f98210d040b9d7486c381d</id>
<content type='text'>
With basic IP block functions and ring functions

Signed-off-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add support for athub v2.1</title>
<updated>2020-07-01T05:59:07Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2019-09-25T08:44:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=45d76eebd874511f9579dd8917b9385d3f9fa137'/>
<id>urn:sha1:45d76eebd874511f9579dd8917b9385d3f9fa137</id>
<content type='text'>
Add athub v2.1 function and support to compile it.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add sdma ip block for sienna_cichlid (v5)</title>
<updated>2020-06-03T17:52:04Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2019-06-17T05:38:29Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=157e72e831cb8f323108b5df6d0b148aef9507fb'/>
<id>urn:sha1:157e72e831cb8f323108b5df6d0b148aef9507fb</id>
<content type='text'>
Sienna_Cichlid have 4 sdma controllers.

v2: add missing license to sdma_common.h (Alex)
v3: rebase (Alex)
v4: squash in policy fix (Alex)
v4: squash in fw_name fix

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add support gfxhub for sienna_cichlid (v3)</title>
<updated>2020-06-03T17:52:01Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2019-06-16T14:27:00Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=af01d47d3c22cb1b1f7f74e22595beeed956c9b5'/>
<id>urn:sha1:af01d47d3c22cb1b1f7f74e22595beeed956c9b5</id>
<content type='text'>
GFX10.3 is used for sienna_cichlid.

v2: squash in BANK_SELECT and FRAGMENT_SIZE fixes (Alex)
v3: squash in smallk update (Alex)

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: initialize IP offset for sienna_cichlid (v2)</title>
<updated>2020-06-03T17:52:00Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2019-11-07T08:28:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=dccdbf3f969033383ac2fbbb64441d89e2de4113'/>
<id>urn:sha1:dccdbf3f969033383ac2fbbb64441d89e2de4113</id>
<content type='text'>
Add IP offset headers and state.

V2: squash in updates (Alex)

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Enable reading FRU chip via I2C v3</title>
<updated>2020-04-01T18:44:41Z</updated>
<author>
<name>Kent Russell</name>
<email>kent.russell@amd.com</email>
</author>
<published>2020-03-13T13:21:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=bd607166af7fe31f8d8e9c575f4561a4b56b9f24'/>
<id>urn:sha1:bd607166af7fe31f8d8e9c575f4561a4b56b9f24</id>
<content type='text'>
Allow for reading of information like manufacturer, product number
and serial number from the FRU chip. Report the serial number as
the new sysfs file serial_number. Note that this only works on
server cards, as consumer cards do not feature the FRU chip, which
contains this information.

v2: Add documentation to amdgpu.rst, add helper functions,
    rename functions for consistency, fix bad starting offset
v3: Remove testing definitions

Signed-off-by: Kent Russell &lt;kent.russell@amd.com&gt;
Reviewed-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add RAS support for the gfx block of Arcturus</title>
<updated>2020-01-22T21:36:30Z</updated>
<author>
<name>Dennis Li</name>
<email>Dennis.Li@amd.com</email>
</author>
<published>2020-01-16T05:40:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=4c461d89db4f8f40509b044b0daf3ac6edf4fbd7'/>
<id>urn:sha1:4c461d89db4f8f40509b044b0daf3ac6edf4fbd7</id>
<content type='text'>
Implement functions to do the RAS error injection and
query EDC counter.

Signed-off-by: Dennis Li &lt;Dennis.Li@amd.com&gt;
Reviewed-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
