<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu.h, branch v4.11</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.11</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.11'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-02-17T21:12:58Z</updated>
<entry>
<title>drm/amd/amdgpu: post card if there is real hw resetting performed</title>
<updated>2017-02-17T21:12:58Z</updated>
<author>
<name>Jim Qu</name>
<email>Jim.Qu@amd.com</email>
</author>
<published>2017-02-10T07:59:59Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c836fec5ce8eb0d0c08fa0ea5fb71df3290d1601'/>
<id>urn:sha1:c836fec5ce8eb0d0c08fa0ea5fb71df3290d1601</id>
<content type='text'>
Check whether we need to post rather than whether the asic is
posted.  There are some cases (e.g., GPU reset or resume from
hibernate) where we need to force post even if the asic has
been posted.

Signed-off-by: Jim Qu &lt;Jim.Qu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: read hw register to check pg status.</title>
<updated>2017-02-13T17:43:04Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2017-02-08T09:17:55Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=254cd2e08dd0c44f9de6424f10390343a34b4f5a'/>
<id>urn:sha1:254cd2e08dd0c44f9de6424f10390343a34b4f5a</id>
<content type='text'>
Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: report the number of bytes moved at buffer creation</title>
<updated>2017-02-09T16:29:44Z</updated>
<author>
<name>Samuel Pitoiset</name>
<email>samuel.pitoiset@gmail.com</email>
</author>
<published>2017-02-09T10:33:37Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=fad061270ac43ff9eed315f0eae7c40b694592de'/>
<id>urn:sha1:fad061270ac43ff9eed315f0eae7c40b694592de</id>
<content type='text'>
Like ttm_bo_validate(), ttm_bo_init() might need to move BO and
the number of bytes moved by TTM should be reported. This can help
the throttle buffer migration mechanism to make a better decision.

v2: fix computation

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Samuel Pitoiset &lt;samuel.pitoiset@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux into drm-next</title>
<updated>2017-01-31T22:39:35Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-01-31T22:39:35Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=29a73d906bd386839015602c4bd35ef2e3531abc'/>
<id>urn:sha1:29a73d906bd386839015602c4bd35ef2e3531abc</id>
<content type='text'>
This is the main feature pull for radeon and amdgpu for 4.11.  Highlights:
- Power and clockgating improvements
- Preliminary SR-IOV support
- ttm buffer priority support
- ttm eviction fixes
- Removal of the ttm lru callbacks
- Remove SI DPM quirks due to MC firmware issues
- Handle VFCT with multiple vbioses
- Powerplay improvements
- Lots of driver cleanups

* 'drm-next-4.11' of git://people.freedesktop.org/~agd5f/linux: (120 commits)
  drm/amdgpu: fix amdgpu_bo_va_mapping flags
  drm/amdgpu: access stolen VRAM directly on CZ (v2)
  drm/amdgpu: access stolen VRAM directly on KV/KB (v2)
  drm/amdgpu: fix kernel panic when dpm disabled on Kv.
  drm/amdgpu: fix dpm bug on Kv.
  drm/amd/powerplay: fix regresstion issue can't set manual dpm mode.
  drm/amdgpu: handle vfct with multiple vbios images
  drm/radeon: handle vfct with multiple vbios images
  drm/amdgpu: move misc si headers into amdgpu
  drm/amdgpu: remove unused header si_reg.h
  drm/radeon: drop pitcairn dpm quirks
  drm/amdgpu: drop pitcairn dpm quirks
  drm: radeon: radeon_ttm: Handle return NULL error from ioremap_nocache
  drm/amd/amdgpu/amdgpu_ttm: Handle return NULL error from ioremap_nocache
  drm/amdgpu: add new virtual display ID
  drm/amd/amdgpu: remove the uncessary parameter for ib scheduler
  drm/amdgpu: Bring bo creation in line with radeon driver (v2)
  drm/amd/powerplay: fix misspelling in header guard
  drm/ttm: revert "add optional LRU removal callback v2"
  drm/ttm: revert "implement LRU add callbacks v2"
  ...
</content>
</entry>
<entry>
<title>drm/amdgpu: fix amdgpu_bo_va_mapping flags</title>
<updated>2017-01-27T17:20:45Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-01-18T13:49:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=268c3001842cb179b54a2825dad9b70151bf4de6'/>
<id>urn:sha1:268c3001842cb179b54a2825dad9b70151bf4de6</id>
<content type='text'>
They are 64bit not 32 for a while now.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Nicolai Hähnle &lt;nicolai.haehnle@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: remove the uncessary parameter for ib scheduler</title>
<updated>2017-01-27T17:20:37Z</updated>
<author>
<name>Junwei Zhang</name>
<email>Jerry.Zhang@amd.com</email>
</author>
<published>2017-01-23T08:30:38Z</published>
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<id>urn:sha1:50ddc75e32bba7cce994d530ec27aec697a372f8</id>
<content type='text'>
Signed-off-by: Junwei Zhang &lt;Jerry.Zhang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:introduce new flag to identify VM domain for cntx_ctrl</title>
<updated>2017-01-27T16:13:35Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-01-17T02:55:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7e6bf80f739bc2becb71964f27ce60e207d10aca'/>
<id>urn:sha1:7e6bf80f739bc2becb71964f27ce60e207d10aca</id>
<content type='text'>
To determine whether the context uses GPUVM or not.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:implement ring_write_multiple</title>
<updated>2017-01-27T16:13:34Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-01-17T02:52:33Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=0a8e147369d558287e46b21a12b15e883abc2075'/>
<id>urn:sha1:0a8e147369d558287e46b21a12b15e883abc2075</id>
<content type='text'>
Write multiple dwords to the ring.

Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: simplify allocation of scratch regs</title>
<updated>2017-01-27T16:13:32Z</updated>
<author>
<name>Nils Wallménius</name>
<email>nils.wallmenius@gmail.com</email>
</author>
<published>2017-01-16T20:56:48Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=50261151a13176a99ee6117dbbb2e557fd0b608b'/>
<id>urn:sha1:50261151a13176a99ee6117dbbb2e557fd0b608b</id>
<content type='text'>
The scratch regs are sequential so there's no need to keep
them in an array, we can just return the index of the first
free register + the base register. Also change the array
of bools for keeping track of the free regs to a bitfield.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Nils Wallménius &lt;nils.wallmenius@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/ring: add two interfaces to support r/w registers with kiq</title>
<updated>2017-01-27T16:13:21Z</updated>
<author>
<name>Xiangliang Yu</name>
<email>Xiangliang.Yu@amd.com</email>
</author>
<published>2017-01-10T04:53:52Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b6091c1217e16606ee231c053cde000d8fa1f674'/>
<id>urn:sha1:b6091c1217e16606ee231c053cde000d8fa1f674</id>
<content type='text'>
During virtual runtime, need to send command to kiq ring to
read/write GPU registers. Add two interface to support the two
actions.

Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Signed-off-by: Monk Linu &lt;Monk.Liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
