<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu.h, branch v4.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2016-08-24T14:27:49Z</updated>
<entry>
<title>drm/amdgpu: fix lru size grouping v2</title>
<updated>2016-08-24T14:27:49Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-08-17T11:44:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5661538749511d4c2f7d33e1e179f10c545b24d5'/>
<id>urn:sha1:5661538749511d4c2f7d33e1e179f10c545b24d5</id>
<content type='text'>
Adding a BO can make it the insertion point for larger sizes as well.

v2: add a comment about the guard structure.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;felix.kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: Change GART offset to 64-bit</title>
<updated>2016-08-16T14:27:09Z</updated>
<author>
<name>Felix Kuehling</name>
<email>Felix.Kuehling@amd.com</email>
</author>
<published>2016-08-12T23:25:21Z</published>
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<id>urn:sha1:cab0b8d50e9bbef62c04067072c953433a87a9ff</id>
<content type='text'>
The GART aperture size can be bigger than 4GB. Therefore the offset
used in amdgpu_gart_bind and amdgpu_gart_unbind must be 64-bit.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: enable UVD context buffer for older HW</title>
<updated>2016-07-29T18:37:10Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-07-26T10:05:40Z</published>
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<id>urn:sha1:4cb5877c6352c42737b53e37d61020ba0cb21c5c</id>
<content type='text'>
Supported starting on certain FW versions.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add a fence timeout for the IB tests v2</title>
<updated>2016-07-29T18:37:04Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-07-05T19:07:17Z</published>
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<id>urn:sha1:bbec97aae660adafa5208c5defc54e3cbbe6b129</id>
<content type='text'>
10ms should be enough for now.

v2: fix some typos in CIK code

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use begin/end_use for VCE power/clock gating</title>
<updated>2016-07-29T18:37:03Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-07-20T14:53:36Z</published>
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<id>urn:sha1:ebff485e9314f8c53f6b22eba0dfbec7228ab268</id>
<content type='text'>
This fixes turning power and clock on when it is actually needed.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add begin/end_use ring callbacks</title>
<updated>2016-07-29T18:37:02Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-07-20T11:49:34Z</published>
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<id>urn:sha1:f06505b8d27119202d76aeb1b80b2ca352c9567e</id>
<content type='text'>
For manual UVD/VCE power and clock gating.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove fence_lock</title>
<updated>2016-07-29T18:37:01Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-07-19T12:44:39Z</published>
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<id>urn:sha1:7c23ace2db5217cfbe066a21d98b761321c67efd</id>
<content type='text'>
Was never used as far as I can see.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix indentation in struct amdgpu_ring</title>
<updated>2016-07-29T18:37:01Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2016-07-19T12:34:17Z</published>
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<id>urn:sha1:92c023c47f3af706b7ad1b6b66efddd13a8bf4bd</id>
<content type='text'>
Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Edward O'Callaghan &lt;funfunctor@folklore1984.net&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add read/write function for GC CAC programming</title>
<updated>2016-07-07T19:06:23Z</updated>
<author>
<name>Rex Zhu</name>
<email>Rex.Zhu@amd.com</email>
</author>
<published>2016-06-08T04:47:41Z</published>
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<id>urn:sha1:ccdbb20a75e3e3917f327a185c1a45722b5d359f</id>
<content type='text'>
Create a GC_CAC_IND_INDEX/DATA pair of funcitons to program
all the CAC registers

Signed-off-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove more of the ring backup code</title>
<updated>2016-07-07T19:06:19Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-07-06T16:40:16Z</published>
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<id>urn:sha1:33b7ed0122e4da0d92d50cc226cd9db659834eaa</id>
<content type='text'>
Not used anymore.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
