<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu.h, branch v5.12</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.12</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.12'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-03-22T19:24:02Z</updated>
<entry>
<title>drm/amdgpu: rework S3/S4/S0ix state handling</title>
<updated>2021-03-22T19:24:02Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-03-12T20:22:36Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8914089a205be1042f99d49d2087663efc6fafa3'/>
<id>urn:sha1:8914089a205be1042f99d49d2087663efc6fafa3</id>
<content type='text'>
Set flags at the top level pmops callbacks to track
state.  This cleans up the current set of flags and
properly handles S4 on S0ix capable systems.

Reviewed-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/display: Add a backlight module option</title>
<updated>2021-03-10T21:12:15Z</updated>
<author>
<name>Takashi Iwai</name>
<email>tiwai@suse.de</email>
</author>
<published>2021-02-03T12:42:41Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7a46f05e5e163c00e41892e671294286e53fe15c'/>
<id>urn:sha1:7a46f05e5e163c00e41892e671294286e53fe15c</id>
<content type='text'>
There seem devices that don't work with the aux channel backlight
control.  For allowing such users to test with the other backlight
control method, provide a new module option, aux_backlight, to specify
enabling or disabling the aux backport support explicitly.  As
default, the aux support is detected by the hardware capability.

v2: make the backlight option generic in case we add future
backlight types (Alex)

BugLink: https://bugzilla.opensuse.org/show_bug.cgi?id=1180749
BugLink: https://gitlab.freedesktop.org/drm/amd/-/issues/1438
Reviewed-by: Nicholas Kazlauskas &lt;nicholas.kazlauskas@amd.com&gt;
Signed-off-by: Takashi Iwai &lt;tiwai@suse.de&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: fix shutdown and poweroff process failed with s0ix</title>
<updated>2021-02-24T14:48:46Z</updated>
<author>
<name>Prike Liang</name>
<email>Prike.Liang@amd.com</email>
</author>
<published>2021-02-22T06:04:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b092b19602cfd47de1eeeb3a1b03822afd86b136'/>
<id>urn:sha1:b092b19602cfd47de1eeeb3a1b03822afd86b136</id>
<content type='text'>
In the shutdown and poweroff opt on the s0i3 system we still need
un-gate the gfx clock gating and power gating before destory amdgpu device.

Fixes: 628c36d7b238e2 ("drm/amdgpu: update amdgpu device suspend/resume sequence for s0i3 support")
Bug: https://gitlab.freedesktop.org/drm/amd/-/issues/1499
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Prike Liang &lt;Prike.Liang@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
<entry>
<title>drm/amdgpu: extend MAX_KIQ_REG_TRY to 1000</title>
<updated>2021-02-09T20:48:49Z</updated>
<author>
<name>Jiawei Gu</name>
<email>Jiawei.Gu@amd.com</email>
</author>
<published>2021-02-05T09:45:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=006cc1a213cf9ff3d1307ff2d5c51e6c8d62a758'/>
<id>urn:sha1:006cc1a213cf9ff3d1307ff2d5c51e6c8d62a758</id>
<content type='text'>
Extend retry times of KIQ to avoid starvation situation caused by
long time full access of GPU by other VFs.

Signed-off-by: Jiawei Gu &lt;Jiawei.Gu@amd.com&gt;
Reviewed-by: Emily.Deng &lt;Emily.Deng@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add generic pci reset as an option</title>
<updated>2021-02-09T20:29:54Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-02-04T15:29:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=af484df800e356725c39f52e7cbe8b47f1753453'/>
<id>urn:sha1:af484df800e356725c39f52e7cbe8b47f1753453</id>
<content type='text'>
This allows us to use generic PCI reset mechanisms (FLR, SBR) as
a reset mechanism to verify that the generic PCI reset mechanisms
are working properly.

Acked-by: Evan Quan &lt;evan.quan@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add otg vertical IRQ Source</title>
<updated>2021-02-09T20:28:55Z</updated>
<author>
<name>Wayne Lin</name>
<email>Wayne.Lin@amd.com</email>
</author>
<published>2021-01-29T06:06:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=11f1a5538ba5f1c4462c806560a343b5258f22b8'/>
<id>urn:sha1:11f1a5538ba5f1c4462c806560a343b5258f22b8</id>
<content type='text'>
[Why &amp; How]
In order to get appropriate timing for registers which
read/write is vertical line sensitive, add new IRQ source variable.
This interrupt is triggered by specific vertical line,

Signed-off-by: Wayne Lin &lt;Wayne.Lin@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-next-5.12-2021-01-08' of https://gitlab.freedesktop.org/agd5f/linux into drm-next</title>
<updated>2021-01-14T23:05:32Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2021-01-14T23:05:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2ce542e517aba3a0b78ba6ec2d859f657e29fa3c'/>
<id>urn:sha1:2ce542e517aba3a0b78ba6ec2d859f657e29fa3c</id>
<content type='text'>
amd-drm-next-5.12-2021-01-08:

amdgpu:
- Rework IH ring handling on vega and navi
- Rework HDP handling for vega and navi
- swSMU documenation updates
- Overdrive support for Sienna Cichlid and newer asics
- swSMU updates for vangogh
- swSMU updates for renoir
- Enable FP16 on DCE8-11
- Misc code cleanups and bug fixes

radeon:
- Fixes for platforms that can't access PCI resources correctly
- Misc code cleanups

From: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210108221811.3868-1-alexander.deucher@amd.com
Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'drm-misc-next-2020-12-17' of git://anongit.freedesktop.org/drm/drm-misc into drm-next</title>
<updated>2021-01-07T09:46:32Z</updated>
<author>
<name>Daniel Vetter</name>
<email>daniel.vetter@ffwll.ch</email>
</author>
<published>2021-01-07T09:46:32Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=18589d74f45d6af7e7614b6488543d723ebf236a'/>
<id>urn:sha1:18589d74f45d6af7e7614b6488543d723ebf236a</id>
<content type='text'>
drm-misc-next for v5.12:

UAPI Changes:
- Not necessarily one, but we document that userspace needs to force probe connectors.

Cross-subsystem Changes:
- Require FB_ATY_CT for aty on sparc64.
- video: Fix documentation, and a few compiler warnings.
- Add devicetree bindings for DP connectors.
- dma-buf: Update kernel-doc, and add might_lock for resv objects in begin/end_cpu_access.

Core Changes:
- ttm: Warn when releasing a pinned bo.
- ttm: Cleanup bo size handling.
- cma-helper: Remove prime infix, and implement mmap as GEM CMA functions.
- Split drm_prime_sg_to_page_addr_arrays into 2 functions.
- Add a new api to install irq using devm.
- Update panel kerneldoc to inline style.
- Add DP support to drm/bridge.
- Assorted small fixes to ttm, fb-helper, scheduler.
- Add atomic_commit_setup function callback.
- Automatically use the atomic gamma_set, instead of forcing drivers to declare the default atomic version.
- Allow using degamma for legacy gamma if gamma is not available.
- Clarify that primary/cursor planes are not tied to 1 crtc (depending on possible_crtcs).
- ttm: Cleanup the lru handler.

Driver Changes:
- Add pm support to ingenic.
- Assorted small fixes in radeon, via, rockchip, omap2fb, kmb, gma500, nouveau, virtio, hisilicon, ingenic, s6e63m0 panel, ast, udlfb.
- Add BOE NV110WTM-N61, ys57pss36bh5gq, Khadas TS050 panels.
- Stop using pages with drm_prime_sg_to_page_addr_arrays, and switch all callers to use ttm_sg_tt_init.
- Cleanup compiler and docbook warnings in a lot of fbdev devices.
- Use the drmm_vram_helper in hisilicon.
- Add support for BCM2711 DSI1 in vc4.
- Add support for 8-bit delta RGB panels to ingenic.
- Add documentation on how to test vkms.
- Convert vc4 to atomic helpers.
- Use degamma instead of gamma table in omap, to add support for CTM and color encoding/range properties.
- Rework omap DSI code, and merge all omapdrm modules now that the last omap panel is now a drm panel.
- More refactoring of omap dsi code.
- Enable 10/12 bpc outputs in vc4.

Signed-off-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
From: Maarten Lankhorst &lt;maarten.lankhorst@linux.intel.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/78381a4f-45fd-aed4-174a-94ba051edd37@linux.intel.com
</content>
</entry>
<entry>
<title>drm/amdgpu: switch hdp callback functions for hdp v4</title>
<updated>2021-01-05T16:33:01Z</updated>
<author>
<name>Likun Gao</name>
<email>Likun.Gao@amd.com</email>
</author>
<published>2020-12-28T08:54:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=455d40c92713e9478ea9da057bf07719787c1c03'/>
<id>urn:sha1:455d40c92713e9478ea9da057bf07719787c1c03</id>
<content type='text'>
Switch to use the HDP functions which unified on hdp structure instead of
the scattered hdp callback functions.
V2: clean up hdp reset ras error count function.

Signed-off-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add amdgpu_hdp structure</title>
<updated>2021-01-05T16:32:41Z</updated>
<author>
<name>Hawking Zhang</name>
<email>Hawking.Zhang@amd.com</email>
</author>
<published>2020-12-24T07:49:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=b291a3872b5a8f105025c22a956c853779ad2326'/>
<id>urn:sha1:b291a3872b5a8f105025c22a956c853779ad2326</id>
<content type='text'>
amdgpu_hdp hold all the callbacks for hdp

Signed-off-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Likun Gao &lt;Likun.Gao@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
