<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu.h, branch v5.14</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.14</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.14'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-07-16T18:17:05Z</updated>
<entry>
<title>amdgpu/nv.c - Optimize code for video codec support structure</title>
<updated>2021-07-16T18:17:05Z</updated>
<author>
<name>Veerabadhran Gopalakrishnan</name>
<email>veerabadhran.gopalakrishnan@amd.com</email>
</author>
<published>2021-07-13T17:51:43Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=6505d6fcc616472c1b4d6298beacf52673c7b072'/>
<id>urn:sha1:6505d6fcc616472c1b4d6298beacf52673c7b072</id>
<content type='text'>
Optimized the code for codec info structure initialization

Signed-off-by: Veerabadhran Gopalakrishnan &lt;veerabadhran.gopalakrishnan@amd.com&gt;
Reviewed-by: James Zhu &lt;James.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Don't flush/invalidate HDP for APUs and A+A</title>
<updated>2021-06-04T20:02:38Z</updated>
<author>
<name>Eric Huang</name>
<email>jinhuieric.huang@amd.com</email>
</author>
<published>2021-06-02T19:05:20Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=810085ddb7b76c1cc5059a1feb3b1250eceacf23'/>
<id>urn:sha1:810085ddb7b76c1cc5059a1feb3b1250eceacf23</id>
<content type='text'>
Integrate two generic functions to determine if HDP
flush is needed for all Asics.

Signed-off-by: Eric Huang &lt;jinhuieric.huang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: attr to control SS2.0 bias level (v2)</title>
<updated>2021-06-04T16:40:00Z</updated>
<author>
<name>Sathishkumar S</name>
<email>sathishkumar.sundararaju@amd.com</email>
</author>
<published>2021-05-30T05:17:16Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=30d95a37f46d1be90048c565d3ec380ddecb0541'/>
<id>urn:sha1:30d95a37f46d1be90048c565d3ec380ddecb0541</id>
<content type='text'>
add sysfs attr to read/write smartshift bias level.
document smartshift_bias sysfs attr.

V2: add attr to amdgpu_device_attrs and use attr_update (Lijo)

Signed-off-by: Sathishkumar S &lt;sathishkumar.sundararaju@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-next-5.14-2021-06-02' of https://gitlab.freedesktop.org/agd5f/linux into drm-next</title>
<updated>2021-06-03T20:13:57Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2021-06-03T20:13:56Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=5745d647d5563d3e9d32013ad4e5c629acff04d7'/>
<id>urn:sha1:5745d647d5563d3e9d32013ad4e5c629acff04d7</id>
<content type='text'>
amd-drm-next-5.14-2021-06-02:

amdgpu:
- GC/MM register access macro clean up for SR-IOV
- Beige Goby updates
- W=1 Fixes
- Aldebaran fixes
- Misc display fixes
- ACPI ATCS/ATIF handling rework
- SR-IOV fixes
- RAS fixes
- 16bpc fixed point format support
- Initial smartshift support
- RV/PCO power tuning fixes for suspend/resume
- More buffer object subclassing work
- Add new INFO query for additional vbios information
- Add new placement for preemptable SG buffers

amdkfd:
- Misc fixes

radeon:
- W=1 Fixes
- Misc cleanups

UAPI:
- Add new INFO query for additional vbios information
  Useful for debugging vbios related issues.  Proposed umr patch:
  https://patchwork.freedesktop.org/patch/433297/
- 16bpc fixed point format support
  IGT test:
  https://lists.freedesktop.org/archives/igt-dev/2021-May/031507.html
  Proposed Vulkan patch:
  https://github.com/kleinerm/pal/commit/a25d4802074b13a8d5f7edc96ae45469ecbac3c4
- Add a new GEM flag which is only used internally in the kernel driver.  Userspace
  is not allowed to set it.

drm:
- 16bpc fixed point format fourcc

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;
From: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210602214009.4553-1-alexander.deucher@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: enable smart shift on dGPU (v5)</title>
<updated>2021-06-02T02:55:38Z</updated>
<author>
<name>Sathishkumar S</name>
<email>sathishkumar.sundararaju@amd.com</email>
</author>
<published>2021-05-26T10:36:19Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3fa8f89d72073206cad0a8840ce65afa239911ad'/>
<id>urn:sha1:3fa8f89d72073206cad0a8840ce65afa239911ad</id>
<content type='text'>
enable smart shift on dGPU if it is part of HG system and
the platform supports ATCS method to handle power shift.

V2: avoid psc updates in baco enter and exit (Lijo)
    fix alignment (Shashank)
V3: rebased on unified ATCS handling. (Alex)
V4: check for return value and warn on failed update (Shashank)
    return 0 if device does not support smart shift.  (Lizo)
V5: rebased on ATPX/ATCS structures global (Alex)

Signed-off-by: Sathishkumar S &lt;sathishkumar.sundararaju@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Shashank Sharma &lt;shashank.sharma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: support atcs method powershift (v4)</title>
<updated>2021-06-02T02:36:48Z</updated>
<author>
<name>Sathishkumar S</name>
<email>sathishkumar.sundararaju@amd.com</email>
</author>
<published>2021-05-10T14:00:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=16eb48c62bd3ff1a523cd1d59591e694bd60277a'/>
<id>urn:sha1:16eb48c62bd3ff1a523cd1d59591e694bd60277a</id>
<content type='text'>
add support to handle ATCS method for power shift control.
used to communicate dGPU device state to SBIOS.

V2: use defined acpi func for checking psc support (Lijo)
    fix alignment (Shashank)
V3: rebased on unified ATCS handling (Alex)
V4: rebased on ATPX/ATCS structures global (Alex)

Signed-off-by: Sathishkumar S &lt;sathishkumar.sundararaju@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/acpi: make ATPX/ATCS structures global (v2)</title>
<updated>2021-05-27T16:33:52Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-05-25T21:40:58Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f9b7f3703ff97768a8dfabd42bdb107681f1da22'/>
<id>urn:sha1:f9b7f3703ff97768a8dfabd42bdb107681f1da22</id>
<content type='text'>
They are global ACPI methods, so maybe the structures
global in the driver. This simplified a number of things
in the handling of these methods.

v2: reset the handle if verify interface fails (Lijo)
v3: fix compilation when ACPI is not defined.

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Rename flag which prevents HW access</title>
<updated>2021-05-25T15:53:52Z</updated>
<author>
<name>Andrey Grodzovsky</name>
<email>andrey.grodzovsky@amd.com</email>
</author>
<published>2021-05-21T20:41:21Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7afefb81b72cbc35aea44ed741bc1e9ee915e4c9'/>
<id>urn:sha1:7afefb81b72cbc35aea44ed741bc1e9ee915e4c9</id>
<content type='text'>
Make it's name not feature but function descriptive.

Signed-off-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210521204122.762288-1-andrey.grodzovsky@amd.com
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-misc-next</title>
<updated>2021-05-22T05:17:05Z</updated>
<author>
<name>Thomas Zimmermann</name>
<email>tzimmermann@suse.de</email>
</author>
<published>2021-05-22T05:17:05Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=304ba5dca49a21e6f4040494c669134787145118'/>
<id>urn:sha1:304ba5dca49a21e6f4040494c669134787145118</id>
<content type='text'>
Backmerging from drm/drm-next to the patches for AMD devices
for v5.14.

Signed-off-by: Thomas Zimmermann &lt;tzimmermann@suse.de&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/acpi: unify ATCS handling (v3)</title>
<updated>2021-05-21T22:03:01Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2021-05-19T19:47:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=77bf762f8b3011b2d00eb49098071952956da892'/>
<id>urn:sha1:77bf762f8b3011b2d00eb49098071952956da892</id>
<content type='text'>
Treat it like ATIF and check both the dGPU and APU for
the method.  This is required because ATCS may be hung
off of the APU in ACPI on A+A systems.

v2: add back accidently removed ACPI handle check.
v3: Fix incorrect atif check (Colin)
    Fix uninitialized variable (Colin)

Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
