<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu.h, branch v6.7</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v6.7</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v6.7'/>
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<updated>2023-11-17T05:58:20Z</updated>
<entry>
<title>drm/amdgpu: add a module parameter to control the AGP aperture</title>
<updated>2023-11-17T05:58:20Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2023-11-09T20:31:00Z</published>
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<id>urn:sha1:6ba5b613837c5d997ad8297b22fc46cd0be58d76</id>
<content type='text'>
Add a module parameter to control the AGP aperture.  The AGP
aperture is an aperture in the GPU's internal address space
which provides direct non-paged access to the platform address
space.  This access is non-snooped so only uncached memory
can be accessed.

Add a knob so that we can toggle this for debugging.

Fixes: 67318cb84341 ("drm/amdgpu/gmc11: set gart placement GC11")
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Tested-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt; # PHX &amp; Navi33
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use correct KIQ MEC engine for gfx9.4.3 (v5)</title>
<updated>2023-11-09T22:03:07Z</updated>
<author>
<name>Victor Lu</name>
<email>victorchengchi.lu@amd.com</email>
</author>
<published>2023-10-03T20:15:52Z</published>
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<id>urn:sha1:85150626ea0423fd0adb5ac9b5ab4bbaff9aa30b</id>
<content type='text'>
amdgpu_kiq_wreg/rreg is hardcoded to use MEC engine 0.

Add an xcc_id parameter to amdgpu_kiq_wreg/rreg, define W/RREG32_XCC
and amdgpu_device_xcc_wreg/rreg to use the new xcc_id parameter.

Using amdgpu_sriov_runtime to determine whether to access via kiq or
RLC is sufficient for now.

v5: add condition in amdgpu_device_xcc_w/rreg, remove trace func call

v4: avoid using amdgpu_sriov_w/rreg

v3: use W/RREG32_XCC to handle non-kiq case

v2: define amdgpu_device_xcc_wreg/rreg instead of changing parameters
    of amdgpu_device_wreg/rreg

Signed-off-by: Victor Lu &lt;victorchengchi.lu@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove unused macro HW_REV</title>
<updated>2023-10-31T21:13:59Z</updated>
<author>
<name>Yang Wang</name>
<email>kevinyang.wang@amd.com</email>
</author>
<published>2023-10-31T02:12:00Z</published>
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<id>urn:sha1:2bfb0ca3dd0c40b929ecedf1fc941c139945d055</id>
<content type='text'>
remove unused macro HW_REV

Signed-off-by: Yang Wang &lt;kevinyang.wang@amd.com&gt;
Reviewed-by: Kenneth Feng &lt;kenneth.feng@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Explicitly disable ASPM when dynamic switching disabled</title>
<updated>2023-10-26T22:41:23Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-10-23T20:50:05Z</published>
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<id>urn:sha1:2757a848cb0f184850d3e0a33b4a69e8014fdc5d</id>
<content type='text'>
Currently there are separate but related checks:
* amdgpu_device_should_use_aspm()
* amdgpu_device_aspm_support_quirk()
* amdgpu_device_pcie_dynamic_switching_supported()

Simplify into checking whether DPM was enabled or not in the auto
case.  This works because amdgpu_device_pcie_dynamic_switching_supported()
populates that value.

Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Add API to get full IP version</title>
<updated>2023-10-26T22:41:21Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-10-12T09:37:41Z</published>
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<id>urn:sha1:8eece69acee335580449ced3356f150610916fba</id>
<content type='text'>
Fetch the full version of IP including variant and subrevision.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Reviewed-by: Le Ma &lt;le.ma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move coredump code to amdgpu_reset file</title>
<updated>2023-10-20T19:11:29Z</updated>
<author>
<name>André Almeida</name>
<email>andrealmeid@igalia.com</email>
</author>
<published>2023-09-15T14:44:16Z</published>
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<id>urn:sha1:69619868d39bf364721db8d9d2429420704417a3</id>
<content type='text'>
Giving that we use codedump just for device resets, move it's functions
and structs to a more semantic file, the amdgpu_reset.{c, h}.

Signed-off-by: André Almeida &lt;andrealmeid@igalia.com&gt;
Signed-off-by: Shashank Sharma &lt;shashank.sharma@amd.com&gt;
Reviewed-by: Shashank Sharma &lt;shashank.sharma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Encapsulate all device reset info</title>
<updated>2023-10-20T19:11:28Z</updated>
<author>
<name>André Almeida</name>
<email>andrealmeid@igalia.com</email>
</author>
<published>2023-09-15T14:38:59Z</published>
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<id>urn:sha1:2d6a2a28cdeade75021503f86e57e7ebce7eb74c</id>
<content type='text'>
To better organize struct amdgpu_device, keep all reset information
related fields together in a separated struct.

Signed-off-by: André Almeida &lt;andrealmeid@igalia.com&gt;
Signed-off-by: Shashank Sharma &lt;shashank.sharma@amd.com&gt;
Reviewed-by: Shashank Sharma &lt;shashank.sharma@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: Evict resources during PM ops prepare() callback</title>
<updated>2023-10-13T15:00:18Z</updated>
<author>
<name>Mario Limonciello</name>
<email>mario.limonciello@amd.com</email>
</author>
<published>2023-10-06T18:50:20Z</published>
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<id>urn:sha1:5095d5418193eb2748c7d8553c7150b8f1c44696</id>
<content type='text'>
Linux PM core has a prepare() callback run before suspend.

If the system is under high memory pressure, the resources may need
to be evicted into swap instead.  If the storage backing for swap
is offlined during the suspend() step then such a call may fail.

So move this step into prepare() to move evict majority of
resources and update all non-pmops callers to call the same callback.

Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2362
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Mario Limonciello &lt;mario.limonciello@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Refactor FRU product information</title>
<updated>2023-10-09T20:52:08Z</updated>
<author>
<name>Lijo Lazar</name>
<email>lijo.lazar@amd.com</email>
</author>
<published>2023-10-04T10:30:47Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=8a2b51392ac4a5ecc310c6dddd6cb70c71f0ddeb'/>
<id>urn:sha1:8a2b51392ac4a5ecc310c6dddd6cb70c71f0ddeb</id>
<content type='text'>
Keep FRU related information together in a separate structure.

Signed-off-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Reviewed-by: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Fix complex macros error</title>
<updated>2023-10-05T21:59:35Z</updated>
<author>
<name>Srinivasan Shanmugam</name>
<email>srinivasan.shanmugam@amd.com</email>
</author>
<published>2023-09-30T06:25:11Z</published>
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<id>urn:sha1:2b6b29f33fddc8d61527d5f5cf1dec9e1821b16c</id>
<content type='text'>
Fixes the below:

ERROR: Macros with complex values should be enclosed in parentheses

WARNING: macros should not use a trailing semicolon
+#define amdgpu_inc_vram_lost(adev) atomic_inc(&amp;((adev)-&gt;vram_lost_counter));

Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Pan, Xinhui" &lt;Xinhui.Pan@amd.com&gt;
Signed-off-by: Srinivasan Shanmugam &lt;srinivasan.shanmugam@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
