<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c, branch v5.8</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.8</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.8'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2020-04-30T20:48:55Z</updated>
<entry>
<title>drm/amdgpu: remove set but not used variable 'priority'</title>
<updated>2020-04-30T20:48:55Z</updated>
<author>
<name>Zheng Bin</name>
<email>zhengbin13@huawei.com</email>
</author>
<published>2020-04-30T02:26:51Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2cba3944ec3710aab90fc84aec5a27a7ad47fc0a'/>
<id>urn:sha1:2cba3944ec3710aab90fc84aec5a27a7ad47fc0a</id>
<content type='text'>
Fixes gcc '-Wunused-but-set-variable' warning:

drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c:1211:26: warning: variable ‘priority’ set but not used

It is not used since commit 33abcb1f5a17 ("drm/amdgpu:
set compute queue priority at mqd_init")

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reported-by: Hulk Robot &lt;hulkci@huawei.com&gt;
Signed-off-by: Zheng Bin &lt;zhengbin13@huawei.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: cleanup IB pool handling a bit</title>
<updated>2020-04-28T20:20:30Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2020-04-01T09:18:21Z</published>
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<id>urn:sha1:9ecefb19c3a6626c27ea7ee72d431f22462e1d54</id>
<content type='text'>
Fix the coding style, move and rename the definitions to
better match what they are supposed to be doing.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Move to a per-IB secure flag (TMZ)</title>
<updated>2020-04-28T20:20:29Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2020-04-22T21:56:56Z</published>
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<id>urn:sha1:0bb5d5b03f78aeb5f87d47877eb15532875c64da</id>
<content type='text'>
Move from a per-CS secure flag (TMZ) to a per-IB
secure flag.

Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: job is secure iff CS is secure (v5)</title>
<updated>2020-04-28T20:20:28Z</updated>
<author>
<name>Huang Rui</name>
<email>ray.huang@amd.com</email>
</author>
<published>2019-08-08T12:05:15Z</published>
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<id>urn:sha1:cb5fae143d79d255251921066dbf8eae16383639</id>
<content type='text'>
Mark a job as secure, if and only if the command
submission flag has the secure flag set.

v2: fix the null job pointer while in vmid 0
submission.
v3: Context --&gt; Command submission.
v4: filling cs parser with cs-&gt;in.flags
v5: move the job secure flag setting out of amdgpu_cs_submit()

Signed-off-by: Huang Rui &lt;ray.huang@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: implement more ib pools (v2)</title>
<updated>2020-04-01T18:44:44Z</updated>
<author>
<name>xinhui pan</name>
<email>xinhui.pan@amd.com</email>
</author>
<published>2020-03-26T00:38:29Z</published>
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<id>urn:sha1:c8e42d57859d5055bfe3313cfd5dc025097b753e</id>
<content type='text'>
We have three ib pools, they are normal, VM, direct pools.

Any jobs which schedule IBs without dependence on gpu scheduler should
use DIRECT pool.

Any jobs schedule direct VM update IBs should use VM pool.

Any other jobs use NORMAL pool.

v2: squash in coding style fix

Signed-off-by: xinhui pan &lt;xinhui.pan@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'amd-drm-next-5.7-2020-03-10' of git://people.freedesktop.org/~agd5f/linux into drm-next</title>
<updated>2020-03-12T23:09:11Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2020-03-12T23:09:11Z</published>
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<id>urn:sha1:69ddce0970d9d1de63bed9c24eefa0814db29a5a</id>
<content type='text'>
amd-drm-next-5.7-2020-03-10:

amdgpu:
- SR-IOV fixes
- Fix up fallout from drm load/unload callback removal
- Navi, renoir power management watermark fixes
- Refactor smu parameter handling
- Display FEC fixes
- Display DCC fixes
- HDCP fixes
- Add support for USB-C PD firmware updates
- Pollock detection fix
- Rework compute ring priority handling
- RAS fixes
- Misc cleanups

amdkfd:
- Consolidate more gfx config details in amdgpu
- Consolidate bo alloc flags
- Improve code comments
- SDMA MQD fixes
- Misc cleanups

gpu scheduler:
- Add suport for modifying the sched list

uapi:
- Clarify comments about GEM_CREATE flags that are not used by userspace.
  The kernel driver has always prevented userspace from using these.
  They are only used internally in the kernel driver.

Signed-off-by: Dave Airlie &lt;airlied@redhat.com&gt;

From: Alex Deucher &lt;alexdeucher@gmail.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20200310212748.4519-1-alexander.deucher@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: set compute queue priority at mqd_init</title>
<updated>2020-03-09T17:51:24Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2020-02-27T12:59:08Z</published>
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<id>urn:sha1:33abcb1f5a1719b1c18867e5bf24fb70efe98804</id>
<content type='text'>
We were changing compute ring priority while rings were being used
before every job submission which is not recommended. This patch
sets compute queue priority at mqd initialization for gfx8, gfx9 and
gfx10.

Policy: make queue 0 of each pipe as high priority compute queue

High/normal priority compute sched lists are generated from set of high/normal
priority compute queues. At context creation, entity of compute queue
get a sched list from high or normal priority depending on ctx-&gt;priority

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Acked-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge drm/drm-next into drm-misc-next</title>
<updated>2020-03-04T07:56:28Z</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime@cerno.tech</email>
</author>
<published>2020-03-04T07:56:28Z</published>
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<id>urn:sha1:83794ee6c13b41c7db86ccfcaa20dc360b08fdb6</id>
<content type='text'>
Daniel needs a few commits from drm-next.

Signed-off-by: Maxime Ripard &lt;maxime@cerno.tech&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use allowed_domains for exported DMA-bufs</title>
<updated>2020-02-27T13:58:01Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2019-05-06T14:35:26Z</published>
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<id>urn:sha1:4993ba02635f69ec35d20e4b3f07c51e8a2a7171</id>
<content type='text'>
Avoid that we ping/pong the buffers when we stop to pin DMA-buf
exports by using the allowed domains for exported buffers.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Acked-by: Daniel Vetter &lt;daniel.vetter@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/353996/?series=73646&amp;rev=1
</content>
</entry>
<entry>
<title>drm/amdgpu: rework job synchronization v2</title>
<updated>2020-02-05T04:30:39Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2019-12-16T15:07:06Z</published>
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<id>urn:sha1:5d3196605d00b513a735b358f5e4f2d1b65f6c3a</id>
<content type='text'>
For unlocked page table updates we need to be able
to sync to fences of a specific VM.

v2: use SYNC_ALWAYS in the UVD code

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Felix Kuehling &lt;Felix.Kuehling@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
