<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c, branch v5.17</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.17</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.17'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2021-09-01T20:55:11Z</updated>
<entry>
<title>drm/amdgpu:schedule vce/vcn encode based on priority</title>
<updated>2021-09-01T20:55:11Z</updated>
<author>
<name>Satyajit Sahu</name>
<email>satyajit.sahu@amd.com</email>
</author>
<published>2021-08-26T06:50:14Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=7d7630fc6b8850ceae5a708bd37dcc7583658316'/>
<id>urn:sha1:7d7630fc6b8850ceae5a708bd37dcc7583658316</id>
<content type='text'>
Schedule the encode job in VCE/VCN encode ring
based on the priority set by UMD.

Signed-off-by: Satyajit Sahu &lt;satyajit.sahu@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: detach ring priority from gfx priority</title>
<updated>2021-09-01T20:55:11Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2021-08-25T15:11:31Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=34eaf30f9a66d94f1185df852987957240b8846c'/>
<id>urn:sha1:34eaf30f9a66d94f1185df852987957240b8846c</id>
<content type='text'>
Currently AMDGPU_RING_PRIO_MAX is redefinition of a
max gfx hwip priority, this won't work well when we will
have a hwip with different set of priorities than gfx.
Also, HW ring priorities are different from ring priorities.

Create a global enum for ring priority levels which each
HWIP can use to define its own priority levels.

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Reviewed-by: Lijo Lazar &lt;lijo.lazar@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: rework context priority handling</title>
<updated>2021-09-01T20:55:11Z</updated>
<author>
<name>Nirmoy Das</name>
<email>nirmoy.das@amd.com</email>
</author>
<published>2021-08-24T18:39:18Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=84d588c3de84d07ef83608b60faa4fffdea32aad'/>
<id>urn:sha1:84d588c3de84d07ef83608b60faa4fffdea32aad</id>
<content type='text'>
To get a hardware queue priority for a context, we are currently
mapping AMDGPU_CTX_PRIORITY_* to DRM_SCHED_PRIORITY_* and then
to hardware queue priority, which is not the right way to do that
as DRM_SCHED_PRIORITY_* is software scheduler's priority and it is
independent from a hardware queue priority.

Use userspace provided context priority, AMDGPU_CTX_PRIORITY_* to
map a context to proper hardware queue priority.

Signed-off-by: Nirmoy Das &lt;nirmoy.das@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Use delayed work to collect RAS error counters</title>
<updated>2021-05-27T16:23:06Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2021-05-21T15:53:09Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=05adfd80cc52e0b4581e65bb5418de5dfd24d105'/>
<id>urn:sha1:05adfd80cc52e0b4581e65bb5418de5dfd24d105</id>
<content type='text'>
On Context Query2 IOCTL return the correctable and
uncorrectable errors in O(1) fashion, from cached
values, and schedule a delayed work function to
calculate and cache them for the next such IOCTL.

v2: Cancel pending delayed work at ras_fini().
v3: Remove conditionals when dealing with delayed
    work manipulation as they're inherently racy.

Cc: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Cc: Christian König &lt;christian.koenig@amd.com&gt;
Cc: John Clements &lt;john.clements@amd.com&gt;
Cc: Hawking Zhang &lt;Hawking.Zhang@amd.com&gt;
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Don't query CE and UE errors</title>
<updated>2021-05-27T16:22:19Z</updated>
<author>
<name>Luben Tuikov</name>
<email>luben.tuikov@amd.com</email>
</author>
<published>2021-05-12T16:33:23Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2871e10199430132c69d81c3c302db05d19db4e1'/>
<id>urn:sha1:2871e10199430132c69d81c3c302db05d19db4e1</id>
<content type='text'>
On QUERY2 IOCTL don't query counts of correctable
and uncorrectable errors, since when RAS is
enabled and supported on Vega20 server boards,
this takes insurmountably long time, in O(n^3),
which slows the system down to the point of it
being unusable when we have GUI up.

Fixes: ae363a212b14 ("drm/amdgpu: Add a new flag to AMDGPU_CTX_OP_QUERY_STATE2")
Cc: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Cc: stable@vger.kernel.org
Signed-off-by: Luben Tuikov &lt;luben.tuikov@amd.com&gt;
Reviewed-by: Alexander Deucher &lt;Alexander.Deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix fence calculation (v2)</title>
<updated>2021-05-13T18:09:12Z</updated>
<author>
<name>David M Nieto</name>
<email>david.nieto@amd.com</email>
</author>
<published>2021-05-13T17:45:39Z</published>
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<id>urn:sha1:5c439c38f5fb8fd16b65af4d5bc4618d1ec9bca3</id>
<content type='text'>
The proper metric for fence utilization over several
contexts is an harmonic mean, but such calculation is
prohibitive in kernel space, so the code approximates it.

Because the approximation diverges when one context has a
very small ratio compared with the other context, this change
filter out ratios smaller that 0.01%

v2: make the fence calculation static and initialize variables
within that function

v3: Fix warnings (Alex)

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: David M Nieto &lt;david.nieto@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210513174539.27409-2-david.nieto@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: free resources on fence usage query</title>
<updated>2021-05-13T18:02:24Z</updated>
<author>
<name>David M Nieto</name>
<email>david.nieto@amd.com</email>
</author>
<published>2021-05-13T17:45:38Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=a7f0849682b75b6d50f07c70090443eebd90218c'/>
<id>urn:sha1:a7f0849682b75b6d50f07c70090443eebd90218c</id>
<content type='text'>
Free the resources if the fence needs to be ignored
during the ratio calculation

Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: David M Nieto &lt;david.nieto@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210513174539.27409-1-david.nieto@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu: Add show_fdinfo() interface</title>
<updated>2021-05-05T07:26:53Z</updated>
<author>
<name>Roy Sun</name>
<email>Roy.Sun@amd.com</email>
</author>
<published>2021-04-26T06:27:01Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=874442541133f78c78b6880b8cc495bab5c61704'/>
<id>urn:sha1:874442541133f78c78b6880b8cc495bab5c61704</id>
<content type='text'>
Tracking devices, process info and fence info using
/proc/pid/fdinfo

Signed-off-by: David M Nieto &lt;David.Nieto@amd.com&gt;
Signed-off-by: Roy Sun &lt;Roy.Sun@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20210426062701.39732-2-Roy.Sun@amd.com
</content>
</entry>
<entry>
<title>drm/amdgpu/amdgpu: use "*" adjacent to data name</title>
<updated>2020-11-02T20:35:50Z</updated>
<author>
<name>Deepak R Varma</name>
<email>mh12gx2825@gmail.com</email>
</author>
<published>2020-11-02T19:37:12Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=c4c5ae67d17976d058341b24908d5f562f3ce933'/>
<id>urn:sha1:c4c5ae67d17976d058341b24908d5f562f3ce933</id>
<content type='text'>
When declaring pointer data, the "*" symbol should be used adjacent to
the data name as per the coding standards. This resolves following
issues reported by checkpatch script:
	ERROR: "foo *   bar" should be "foo *bar"
	ERROR: "foo * bar" should be "foo *bar"
	ERROR: "foo*            bar" should be "foo *bar"
	ERROR: "(foo*)" should be "(foo *)"

Signed-off-by: Deepak R Varma &lt;mh12gx2825@gmail.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>amd/amdgpu_ctx: Use struct_size() helper and kmalloc() (v2)</title>
<updated>2020-10-09T18:44:39Z</updated>
<author>
<name>Gustavo A. R. Silva</name>
<email>gustavoars@kernel.org</email>
</author>
<published>2020-10-08T14:34:50Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=201a4eb9dc960b6c081936e0990e289959707996'/>
<id>urn:sha1:201a4eb9dc960b6c081936e0990e289959707996</id>
<content type='text'>
Make use of the new struct_size() helper instead of the offsetof() idiom.
Also, use kmalloc() instead of kcalloc().

v2: squash in kzalloc fix

Signed-off-by: Gustavo A. R. Silva &lt;gustavoars@kernel.org&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
