<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c, branch v5.4</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v5.4</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v5.4'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2019-11-06T20:26:53Z</updated>
<entry>
<title>drm/amdgpu: dont schedule jobs while in reset</title>
<updated>2019-11-06T20:26:53Z</updated>
<author>
<name>Shirish S</name>
<email>shirish.s@amd.com</email>
</author>
<published>2019-10-30T08:50:46Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=f2efc6e60089c99c342a6b7da47f1037e06c4296'/>
<id>urn:sha1:f2efc6e60089c99c342a6b7da47f1037e06c4296</id>
<content type='text'>
[Why]

doing kthread_park()/unpark() from drm_sched_entity_fini
while GPU reset is in progress defeats all the purpose of
drm_sched_stop-&gt;kthread_park.
If drm_sched_entity_fini-&gt;kthread_unpark() happens AFTER
drm_sched_stop-&gt;kthread_park nothing prevents from another
(third) thread to keep submitting job to HW which will be
picked up by the unparked scheduler thread and try to submit
to HW but fail because the HW ring is deactivated.

[How]
grab the reset lock before calling drm_sched_entity_fini()

Signed-off-by: Shirish S &lt;shirish.s@amd.com&gt;
Suggested-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Andrey Grodzovsky &lt;andrey.grodzovsky@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: correct ras error count type</title>
<updated>2019-08-23T16:30:32Z</updated>
<author>
<name>Guchun Chen</name>
<email>guchun.chen@amd.com</email>
</author>
<published>2019-08-16T07:06:52Z</published>
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<id>urn:sha1:64cc5414fbf673cf676e257f9d6c999357947488</id>
<content type='text'>
Use unsigned long type for the same ras count variable.
This will avoid overflow on 64 bit system.

Signed-off-by: Guchun Chen &lt;guchun.chen@amd.com&gt;
Reviewed-by: Tao Zhou &lt;tao.zhou1@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix dma_fence_wait without reference</title>
<updated>2019-08-22T22:17:53Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2019-08-16T12:56:35Z</published>
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<id>urn:sha1:75e1cafde153dd52b660f41bf4866fa22f98da9b</id>
<content type='text'>
We need to grab a reference to the fence we wait for.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use exiting amdgpu_ctx_total_num_entities function</title>
<updated>2019-08-15T15:51:45Z</updated>
<author>
<name>Kevin Wang</name>
<email>kevin1.wang@amd.com</email>
</author>
<published>2019-08-13T08:52:04Z</published>
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<id>urn:sha1:f0f50dcfd427f9f4a179048f4b56bff176bacc94</id>
<content type='text'>
simplify driver code.

Signed-off-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: fix typo error amdgput -&gt; amdgpu</title>
<updated>2019-08-15T15:51:37Z</updated>
<author>
<name>Kevin Wang</name>
<email>kevin1.wang@amd.com</email>
</author>
<published>2019-08-13T08:48:28Z</published>
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<id>urn:sha1:b81e57fbf92e76ce8b7329650440021ebb4e00a0</id>
<content type='text'>
fix typo error:
change function name from "amdgput_ctx_total_num_entities" to
"amdgpu_ctx_total_num_entities".

Signed-off-by: Kevin Wang &lt;kevin1.wang@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu:add all VCN rings into schedule request queue</title>
<updated>2019-07-18T19:18:07Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2019-07-01T23:12:14Z</published>
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<id>urn:sha1:1da418ba65a735bd90ceb8e72afb735f6103a354</id>
<content type='text'>
Add all VCN instances' decode/encode/jpeg decode rings into
drm_sched_rq list.

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Reviewed-by: Boyuan Zhang &lt;boyuan.zhang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: modify amdgpu_vcn to support multiple instances</title>
<updated>2019-07-18T19:18:05Z</updated>
<author>
<name>James Zhu</name>
<email>James.Zhu@amd.com</email>
</author>
<published>2019-07-10T15:53:34Z</published>
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<id>urn:sha1:c01b6a1d38675652199d12b898c1c23b96b5055f</id>
<content type='text'>
Arcturus has dual-VCN. Need Restruct amdgpu_device::vcn to support
multiple vcns. There are no any logical changes here

Signed-off-by: James Zhu &lt;James.Zhu@amd.com&gt;
Reviewed-by: Leo Liu &lt;leo.liu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd: drop use of drmP.h in amdgpu/amdgpu*</title>
<updated>2019-06-10T21:02:48Z</updated>
<author>
<name>Sam Ravnborg</name>
<email>sam@ravnborg.org</email>
</author>
<published>2019-06-09T22:07:56Z</published>
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<id>urn:sha1:fdf2f6c56e5e289c7d7e726b676aba25643b39a0</id>
<content type='text'>
Drop use of drmP.h in all files named amdgpu*
in drm/amd/amdgpu/

Fix fallout.

Signed-off-by: Sam Ravnborg &lt;sam@ravnborg.org&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: "Christian König" &lt;christian.koenig@amd.com&gt;
Cc: "David (ChunMing) Zhou" &lt;David1.Zhou@amd.com&gt;
Cc: David Airlie &lt;airlied@linux.ie&gt;
Cc: Daniel Vetter &lt;daniel@ffwll.ch&gt;
Link: https://patchwork.freedesktop.org/patch/msgid/20190609220757.10862-10-sam@ravnborg.org
</content>
</entry>
<entry>
<title>drm/amdgpu: wait for VM to become idle during flush</title>
<updated>2019-03-19T20:36:58Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2019-01-10T15:48:23Z</published>
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<id>urn:sha1:56753e73fb2ed232278eb69445cb72c6f54391c2</id>
<content type='text'>
Make sure that not only the entities are flush, but that
we also wait for the HW to finish all processing.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: remove non-sense NULL ptr check</title>
<updated>2019-03-19T20:36:58Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2019-01-10T15:40:42Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=3119e7f43be172779019f282aed115b2ec0864fa'/>
<id>urn:sha1:3119e7f43be172779019f282aed115b2ec0864fa</id>
<content type='text'>
It's a bug having a dead pointer in the IDR, silently returning
is the worst we can do.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
