linux/drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.h, branch v5.8

drm/amdgpu: rework sched_list generation

2020-04-09T14:43:14Z

Generate HW IP's sched_list in amdgpu_ring_init() instead of amdgpu_ctx.c. This makes amdgpu_ctx_init_compute_sched(), ring.has_high_prio and amdgpu_ctx_init_sched() unnecessary. This patch also stores sched_list for all HW IPs in one big array in struct amdgpu_device which makes amdgpu_ctx_init_entity() much more leaner. v2: fix a coding style issue do not use drm hw_ip const to populate amdgpu_ring_type enum v3: remove ctx reference and move sched array and num_sched to a struct use num_scheds to detect uninitialized scheduler list v4: use array_index_nospec for user space controlled variables fix possible checkpatch.pl warnings Signed-off-by: Nirmoy Das Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: allocate entities on demand

2020-01-30T22:15:42Z

Currently we pre-allocate entities and fences for all the HW IPs on context creation and some of which are might never be used. This patch tries to resolve entity/fences wastage by creating entity only when needed. v2: allocate memory for entity and fences together Signed-off-by: Nirmoy Das Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: individualize fence allocation per entity

2020-01-22T21:55:27Z

Allocate fences for each entity and remove ctx->fences reference as fences should be bound to amdgpu_ctx_entity instead amdgpu_ctx. Signed-off-by: Nirmoy Das Reviewed-by: Christian König Signed-off-by: Alex Deucher

amd/amdgpu: add sched array to IPs with multiple run-queues

2019-12-18T21:09:12Z

This sched array can be passed on to entity creation routine instead of manually creating such sched array on every context creation. v2: squash in missing break fix Signed-off-by: Nirmoy Das Reviewed-by: Christian König Signed-off-by: Alex Deucher

drm/amdgpu: correct ras error count type

2019-08-23T16:30:32Z

Use unsigned long type for the same ras count variable. This will avoid overflow on 64 bit system. Signed-off-by: Guchun Chen Reviewed-by: Tao Zhou Signed-off-by: Alex Deucher

drm/amdgpu: wait for VM to become idle during flush

2019-03-19T20:36:58Z

Make sure that not only the entities are flush, but that we also wait for the HW to finish all processing. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: Add a new flag to AMDGPU_CTX_OP_QUERY_STATE2

2019-03-19T20:36:51Z

Add AMDGPU_CTX_QUERY2_FLAGS_RAS_CE/UE which indicate if any error happened between previous query and this query. Signed-off-by: xinhui pan Reviewed-by: Alex Deucher Signed-off-by: Alex Deucher

drm/amdgpu: amdgpu_ctx_add_fence can't fail

2018-08-27T20:12:10Z

No more waiting for a fence done here. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Reviewed-by: Junwei Zhang Signed-off-by: Alex Deucher

drm/amdgpu: rework ctx entity creation

2018-08-27T16:11:11Z

Use a fixed number of entities for each hardware IP. The number of compute entities is reduced to four, SDMA keeps it two entities and all other engines just expose one entity. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher

drm/amdgpu: use entity instead of ring for CS

2018-08-27T16:10:48Z

Further demangle ring from entity handling. Signed-off-by: Christian König Reviewed-by: Chunming Zhou Signed-off-by: Alex Deucher