<feed xmlns='http://www.w3.org/2005/Atom'>
<title>linux/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c, branch v4.14</title>
<subtitle>Mirror of https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/
</subtitle>
<id>https://git.shady.money/linux/atom?h=v4.14</id>
<link rel='self' href='https://git.shady.money/linux/atom?h=v4.14'/>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/'/>
<updated>2017-08-24T15:48:42Z</updated>
<entry>
<title>drm/amdgpu: fix and cleanup shadow handling</title>
<updated>2017-08-24T15:48:42Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-08-18T13:50:17Z</published>
<link rel='alternate' type='text/html' href='https://git.shady.money/linux/commit/?id=2e8f9fbe985e930055eb55323b8491cc668b178f'/>
<id>urn:sha1:2e8f9fbe985e930055eb55323b8491cc668b178f</id>
<content type='text'>
Set the shadow flag on the shadow and not the parent, always bind shadow BOs
during allocation instead of manually, use the reservation_object wrappers
to grab the lock.

This fixes a couple of issues with binding the shadow BOs as well as correctly
evicting them when memory becomes tight.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Chunming Zhou &lt;david1.zhou@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add automatic per asic settings for gart_size</title>
<updated>2017-08-24T15:48:41Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-08-21T15:58:25Z</published>
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<id>urn:sha1:db63042b332ae048ca640b3d1aed508973c40c8c</id>
<content type='text'>
We need a larger gart for asics that do not support GPUVM on all
engines (e.g., MM) to make sure we have enough space for all
gtt buffers in physical mode.  Change the default size based on
the asic type.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amd/amdgpu: expose fragment size as module parameter (v2)</title>
<updated>2017-08-17T20:47:43Z</updated>
<author>
<name>Roger He</name>
<email>Hongbo.He@amd.com</email>
</author>
<published>2017-08-15T08:05:59Z</published>
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<id>urn:sha1:d07f14be4d11cf323977672342fb0fc6017052f6</id>
<content type='text'>
Allow overrides on the command line.

v2: agd: sqaush in spelling fix and bogus default value warning

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Roger He &lt;Hongbo.He@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use 256 bit buffers for all wb allocations (v2)</title>
<updated>2017-08-15T18:46:08Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-07-28T16:14:15Z</published>
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<id>urn:sha1:97407b63ea605c12f328ce46b155026080b34246</id>
<content type='text'>
May waste a bit of memory, but simplifies the interface
significantly.

v2: convert internal accounting to use 256bit slots

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: make wb 256bit function names consistent</title>
<updated>2017-08-15T18:45:59Z</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2017-07-27T19:10:50Z</published>
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<id>urn:sha1:eacf3e149ea64c550925b4635f854062bb535005</id>
<content type='text'>
Use a lower case b to be consistent with the other wb functions.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use amdgpu_bo_free_kernel more often</title>
<updated>2017-08-15T18:45:57Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-07-27T15:43:00Z</published>
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<id>urn:sha1:078af1a3e9d7b47f3e37ea25640023cf2e8b4d51</id>
<content type='text'>
Saves us even more loc.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: use amdgpu_bo_create_kernel more often</title>
<updated>2017-08-15T18:45:56Z</updated>
<author>
<name>Christian König</name>
<email>christian.koenig@amd.com</email>
</author>
<published>2017-07-27T15:24:36Z</published>
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<id>urn:sha1:a4a02777892c16d98bbcc2ea2add47950bfbf9e0</id>
<content type='text'>
Saves us quite a bunch of loc.

Signed-off-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: Enable uvd and vce gpu re-init for SRIOV gpu reset</title>
<updated>2017-08-15T18:45:45Z</updated>
<author>
<name>Frank Min</name>
<email>Frank.Min@amd.com</email>
</author>
<published>2017-06-15T12:07:36Z</published>
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<id>urn:sha1:257deb8cc654d365ae27948bb0a21abdbf3066ac</id>
<content type='text'>
Add uvd and vce re-init after gpu reset.

Signed-off-by: Frank Min &lt;Frank.Min@amd.com&gt;
Signed-off-by: Xiangliang.Yu &lt;Xiangliang.Yu@amd.com&gt;
Acked-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux into drm-next</title>
<updated>2017-08-02T02:43:12Z</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2017-08-02T02:43:12Z</published>
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<id>urn:sha1:dd24df657075fdf1e850612ea50634816f3c3581</id>
<content type='text'>
- Stop reprogramming the MC, the vbios already does this in asic_init
- Reduce internal gart to 256M (this does not affect the ttm GTT pool size)
- Initial support for huge pages
- Rework bo migration logic
- Lots of improvements for vega10
- Powerplay fixes
- Additional Raven enablement
- SR-IOV improvements
- Bug fixes
- Code cleanup

* 'drm-next-4.14' of git://people.freedesktop.org/~agd5f/linux: (138 commits)
  drm/amdgpu: fix header on gfx9 clear state
  drm/amdgpu: reduce the time of reading VBIOS
  drm/amdgpu/virtual_dce: Remove the rmmod error message
  drm/amdgpu/gmc9: disable legacy vga features in gmc init
  drm/amdgpu/gmc8: disable legacy vga features in gmc init
  drm/amdgpu/gmc7: disable legacy vga features in gmc init
  drm/amdgpu/gmc6: disable legacy vga features in gmc init (v2)
  drm/radeon: Set depth on low mem to 16 bpp instead of 8 bpp
  drm/amdgpu: fix the incorrect scratch reg number on gfx v6
  drm/amdgpu: fix the incorrect scratch reg number on gfx v7
  drm/amdgpu: fix the incorrect scratch reg number on gfx v8
  drm/amdgpu: fix the incorrect scratch reg number on gfx v9
  drm/amd/powerplay: add support for 3DP 4K@120Hz on vega10.
  drm/amdgpu: enable huge page handling in the VM v5
  drm/amdgpu: increase fragmentation size for Vega10 v2
  drm/amdgpu: ttm_bind only when user needs gpu_addr in bo pin
  drm/amdgpu: correct clock info for SRIOV
  drm/amdgpu/gmc8: SRIOV need to program fb location
  drm/amdgpu: disable firmware loading for psp v10
  drm/amdgpu:fix gfx fence allocate size
  ...
</content>
</entry>
<entry>
<title>drm/amdgpu:fix gfx fence allocate size</title>
<updated>2017-07-25T20:29:26Z</updated>
<author>
<name>Monk Liu</name>
<email>Monk.Liu@amd.com</email>
</author>
<published>2017-06-19T14:19:41Z</published>
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<id>urn:sha1:0915fdbc69f58644f437730fbc9e1f1ab426fe18</id>
<content type='text'>
1, for sriov, we need 8dw for the gfx fence due to CP
behaviour
2, cleanup wrong logic in wptr/rptr wb alloc and free

Change-Id: Ifbfed17a4621dae57244942ffac7de1743de0294
Signed-off-by: Monk Liu &lt;Monk.Liu@amd.com&gt;
Signed-off-by: Xiangliang Yu &lt;Xiangliang.Yu@amd.com&gt;
Reviewed-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
</feed>
